mirror of
https://github.com/RPCS3/llvm.git
synced 2026-08-28 05:10:05 -04:00
Matt Arsenault
e536396218
------------------------------------------------------------------------ r292982 | arsenm | 2017-01-24 14:02:15 -0800 (Tue, 24 Jan 2017) | 8 lines Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@293326 91177308-0d34-0410-b5e6-96231b3b80d8
144 lines
5.1 KiB
LLVM
144 lines
5.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
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; Run with unsafe-fp-math to make sure nothing tries to turn this into 1 / rsqrt(x)
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; FUNC-LABEL: {{^}}v_safe_fsqrt_f32:
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; GCN: v_sqrt_f32_e32 {{v[0-9]+, v[0-9]+}}
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define void @v_safe_fsqrt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #1 {
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%r0 = load float, float addrspace(1)* %in
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%r1 = call float @llvm.sqrt.f32(float %r0)
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store float %r1, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_unsafe_fsqrt_f32:
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; GCN: v_sqrt_f32_e32 {{v[0-9]+, v[0-9]+}}
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define void @v_unsafe_fsqrt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #2 {
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%r0 = load float, float addrspace(1)* %in
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%r1 = call float @llvm.sqrt.f32(float %r0)
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store float %r1, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_sqrt_f32:
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; GCN: v_sqrt_f32_e32
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; R600: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
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; R600: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS
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define void @s_sqrt_f32(float addrspace(1)* %out, float %in) #1 {
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entry:
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%fdiv = call float @llvm.sqrt.f32(float %in)
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store float %fdiv, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_sqrt_v2f32:
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; GCN: v_sqrt_f32_e32
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; GCN: v_sqrt_f32_e32
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; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W
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; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS
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; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X
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; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS
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define void @s_sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) #1 {
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entry:
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%fdiv = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
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store <2 x float> %fdiv, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_sqrt_v4f32:
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; GCN: v_sqrt_f32_e32
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; GCN: v_sqrt_f32_e32
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; GCN: v_sqrt_f32_e32
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; GCN: v_sqrt_f32_e32
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; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y
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; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS
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; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z
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; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS
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; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W
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; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS
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; R600-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X
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; R600-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS
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define void @s_sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) #1 {
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entry:
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%fdiv = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
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store <4 x float> %fdiv, <4 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}elim_redun_check_neg0:
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; GCN: v_sqrt_f32_e32
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; GCN-NOT: v_cndmask
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define void @elim_redun_check_neg0(float addrspace(1)* %out, float %in) #1 {
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entry:
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%sqrt = call float @llvm.sqrt.f32(float %in)
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%cmp = fcmp olt float %in, -0.000000e+00
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%res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt
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store float %res, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}elim_redun_check_pos0:
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; GCN: v_sqrt_f32_e32
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; GCN-NOT: v_cndmask
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define void @elim_redun_check_pos0(float addrspace(1)* %out, float %in) #1 {
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entry:
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%sqrt = call float @llvm.sqrt.f32(float %in)
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%cmp = fcmp olt float %in, 0.000000e+00
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%res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt
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store float %res, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}elim_redun_check_ult:
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; GCN: v_sqrt_f32_e32
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; GCN-NOT: v_cndmask
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define void @elim_redun_check_ult(float addrspace(1)* %out, float %in) #1 {
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entry:
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%sqrt = call float @llvm.sqrt.f32(float %in)
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%cmp = fcmp ult float %in, -0.000000e+00
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%res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt
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store float %res, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}elim_redun_check_v2:
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; GCN: v_sqrt_f32_e32
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; GCN: v_sqrt_f32_e32
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; GCN-NOT: v_cndmask
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define void @elim_redun_check_v2(<2 x float> addrspace(1)* %out, <2 x float> %in) #1 {
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entry:
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%sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
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%cmp = fcmp olt <2 x float> %in, <float -0.000000e+00, float -0.000000e+00>
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%res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt
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store <2 x float> %res, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}elim_redun_check_v2_ult
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; GCN: v_sqrt_f32_e32
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; GCN: v_sqrt_f32_e32
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; GCN-NOT: v_cndmask
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define void @elim_redun_check_v2_ult(<2 x float> addrspace(1)* %out, <2 x float> %in) #1 {
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entry:
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%sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
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%cmp = fcmp ult <2 x float> %in, <float -0.000000e+00, float -0.000000e+00>
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%res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt
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store <2 x float> %res, <2 x float> addrspace(1)* %out
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ret void
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}
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declare float @llvm.sqrt.f32(float %in) #0
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declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) #0
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declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind "unsafe-fp-math"="false" }
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attributes #2 = { nounwind "unsafe-fp-math"="true" }
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