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------------------------------------------------------------------------ r292982 | arsenm | 2017-01-24 14:02:15 -0800 (Tue, 24 Jan 2017) | 8 lines Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@293326 91177308-0d34-0410-b5e6-96231b3b80d8
86 lines
3.0 KiB
LLVM
86 lines
3.0 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
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declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
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; FUNC-LABEL: {{^}}uaddo_i64_zext:
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; SI: add
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; SI: addc
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; SI: addc
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; EG: ADDC_UINT
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; EG: ADDC_UINT
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define void @uaddo_i64_zext(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
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%uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b) nounwind
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%val = extractvalue { i64, i1 } %uadd, 0
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%carry = extractvalue { i64, i1 } %uadd, 1
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%ext = zext i1 %carry to i64
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%add2 = add i64 %val, %ext
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store i64 %add2, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}s_uaddo_i32:
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; SI: s_add_i32
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; EG: ADDC_UINT
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; EG: ADD_INT
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define void @s_uaddo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 %a, i32 %b) nounwind {
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%uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) nounwind
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%val = extractvalue { i32, i1 } %uadd, 0
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%carry = extractvalue { i32, i1 } %uadd, 1
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store i32 %val, i32 addrspace(1)* %out, align 4
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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; FUNC-LABEL: {{^}}v_uaddo_i32:
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; SI: v_add_i32
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; EG: ADDC_UINT
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; EG: ADD_INT
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define void @v_uaddo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%a = load i32, i32 addrspace(1)* %aptr, align 4
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%b = load i32, i32 addrspace(1)* %bptr, align 4
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%uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) nounwind
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%val = extractvalue { i32, i1 } %uadd, 0
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%carry = extractvalue { i32, i1 } %uadd, 1
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store i32 %val, i32 addrspace(1)* %out, align 4
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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; FUNC-LABEL: {{^}}s_uaddo_i64:
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; SI: s_add_u32
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; SI: s_addc_u32
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; EG: ADDC_UINT
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; EG: ADD_INT
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define void @s_uaddo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
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%uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b) nounwind
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%val = extractvalue { i64, i1 } %uadd, 0
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%carry = extractvalue { i64, i1 } %uadd, 1
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store i64 %val, i64 addrspace(1)* %out, align 8
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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; FUNC-LABEL: {{^}}v_uaddo_i64:
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; SI: v_add_i32
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; SI: v_addc_u32
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; EG: ADDC_UINT
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; EG: ADD_INT
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define void @v_uaddo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
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%a = load i64, i64 addrspace(1)* %aptr, align 4
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%b = load i64, i64 addrspace(1)* %bptr, align 4
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%uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b) nounwind
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%val = extractvalue { i64, i1 } %uadd, 0
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%carry = extractvalue { i64, i1 } %uadd, 1
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store i64 %val, i64 addrspace(1)* %out, align 8
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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