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38caf19333
Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277624 91177308-0d34-0410-b5e6-96231b3b80d8
153 lines
3.6 KiB
LLVM
153 lines
3.6 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define signext i32 @foo(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 {
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entry:
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%sub = sub nsw i32 %a, %b
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store i32 %sub, i32* %c, align 4
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%cmp = icmp sgt i32 %a, %b
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%cond = select i1 %cmp, i32 %a, i32 %b
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ret i32 %cond
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; CHECK: @foo
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; CHECK-NOT: subf.
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}
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define signext i32 @foo2(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 {
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entry:
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%shl = shl i32 %a, %b
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store i32 %shl, i32* %c, align 4
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%cmp = icmp sgt i32 %shl, 0
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK: @foo2
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; CHECK-NOT: slw.
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}
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define i64 @fool(i64 %a, i64 %b, i64* nocapture %c) #0 {
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entry:
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%sub = sub nsw i64 %a, %b
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store i64 %sub, i64* %c, align 8
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%cmp = icmp sgt i64 %a, %b
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%cond = select i1 %cmp, i64 %a, i64 %b
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ret i64 %cond
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; CHECK: @fool
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; CHECK: subf. [[REG:[0-9]+]], 4, 3
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; CHECK: isel 3, 3, 4, 1
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; CHECK: std [[REG]], 0(5)
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}
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define i64 @foolb(i64 %a, i64 %b, i64* nocapture %c) #0 {
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entry:
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%sub = sub nsw i64 %a, %b
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store i64 %sub, i64* %c, align 8
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%cmp = icmp sle i64 %a, %b
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%cond = select i1 %cmp, i64 %a, i64 %b
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ret i64 %cond
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; CHECK: @foolb
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; CHECK: subf. [[REG:[0-9]+]], 4, 3
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; CHECK: isel 3, 4, 3, 1
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; CHECK: std [[REG]], 0(5)
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}
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define i64 @foolc(i64 %a, i64 %b, i64* nocapture %c) #0 {
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entry:
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%sub = sub nsw i64 %b, %a
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store i64 %sub, i64* %c, align 8
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%cmp = icmp sgt i64 %a, %b
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%cond = select i1 %cmp, i64 %a, i64 %b
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ret i64 %cond
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; CHECK: @foolc
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; CHECK: subf. [[REG:[0-9]+]], 3, 4
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; CHECK: isel 3, 3, 4, 0
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; CHECK: std [[REG]], 0(5)
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}
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define i64 @foold(i64 %a, i64 %b, i64* nocapture %c) #0 {
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entry:
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%sub = sub nsw i64 %b, %a
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store i64 %sub, i64* %c, align 8
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%cmp = icmp slt i64 %a, %b
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%cond = select i1 %cmp, i64 %a, i64 %b
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ret i64 %cond
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; CHECK: @foold
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; CHECK: subf. [[REG:[0-9]+]], 3, 4
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; CHECK: isel 3, 3, 4, 1
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; CHECK: std [[REG]], 0(5)
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}
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define i64 @foold2(i64 %a, i64 %b, i64* nocapture %c) #0 {
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entry:
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%sub = sub nsw i64 %a, %b
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store i64 %sub, i64* %c, align 8
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%cmp = icmp slt i64 %a, %b
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%cond = select i1 %cmp, i64 %a, i64 %b
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ret i64 %cond
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; CHECK: @foold2
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; CHECK: subf. [[REG:[0-9]+]], 4, 3
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; CHECK: isel 3, 3, 4, 0
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; CHECK: std [[REG]], 0(5)
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}
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define i64 @foo2l(i64 %a, i64 %b, i64* nocapture %c) #0 {
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entry:
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%shl = shl i64 %a, %b
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store i64 %shl, i64* %c, align 8
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%cmp = icmp sgt i64 %shl, 0
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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; CHECK: @foo2l
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; CHECK: sld. 4, 3, 4
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; CHECK: std 4, 0(5)
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}
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define double @food(double %a, double %b, double* nocapture %c) #0 {
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entry:
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%sub = fsub double %a, %b
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store double %sub, double* %c, align 8
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%cmp = fcmp ogt double %a, %b
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%cond = select i1 %cmp, double %a, double %b
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ret double %cond
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; CHECK: @food
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; CHECK-NOT: fsub. 0, 1, 2
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; CHECK: stfd 0, 0(5)
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}
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define float @foof(float %a, float %b, float* nocapture %c) #0 {
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entry:
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%sub = fsub float %a, %b
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store float %sub, float* %c, align 4
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%cmp = fcmp ogt float %a, %b
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%cond = select i1 %cmp, float %a, float %b
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ret float %cond
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; CHECK: @foof
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; CHECK-NOT: fsubs. 0, 1, 2
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; CHECK: stfs 0, 0(5)
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}
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declare i64 @llvm.ctpop.i64(i64);
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define signext i64 @fooct(i64 signext %a, i64 signext %b, i64* nocapture %c) #0 {
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entry:
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%sub = sub nsw i64 %a, %b
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%subc = call i64 @llvm.ctpop.i64(i64 %sub)
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store i64 %subc, i64* %c, align 4
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%cmp = icmp sgt i64 %subc, 0
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%cond = select i1 %cmp, i64 %a, i64 %b
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ret i64 %cond
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; CHECK: @fooct
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; CHECK-NOT: popcntd.
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}
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