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Tom Stellard
3dcb576961
------------------------------------------------------------------------ r267916 | Matthew.Arsenault | 2016-04-28 11:38:48 -0700 (Thu, 28 Apr 2016) | 6 lines AMDGPU: Fix mishandling array allocations when promoting alloca The canonical form for allocas is a single allocation of the array type. In case we see a non-canonical array alloca, make sure we aren't replacing this with an array N times smaller. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@271768 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
2.3 KiB
LLVM
47 lines
2.3 KiB
LLVM
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s
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; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI -mattr=+promote-alloca < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s
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declare i32 @llvm.SI.tid() nounwind readnone
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declare void @llvm.AMDGPU.barrier.local() nounwind convergent
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; The required pointer calculations for the alloca'd actually requires
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; an add and won't be folded into the addressing, which fails with a
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; 64-bit pointer add. This should work since private pointers should
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; be 32-bits.
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; SI-LABEL: {{^}}test_private_array_ptr_calc:
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; FIXME: We end up with zero argument for ADD, because
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; SIRegisterInfo::eliminateFrameIndex() blindly replaces the frame index
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; with the appropriate offset. We should fold this into the store.
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; SI-ALLOCA: v_add_i32_e32 [[PTRREG:v[0-9]+]], vcc, 0, v{{[0-9]+}}
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; SI-ALLOCA: buffer_store_dword {{v[-1-9]+}}, [[PTRREG]], s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen
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; SI-ALLOCA: s_barrier
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; SI-ALLOCA: buffer_load_dword {{v[0-9]+}}, [[PTRREG]], s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen
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;
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; FIXME: The AMDGPUPromoteAlloca pass should be able to convert this
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; alloca to a vector. It currently fails because it does not know how
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; to interpret:
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; getelementptr [16 x i32], [16 x i32]* %alloca, i32 1, i32 %b
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; SI-PROMOTE: v_add_i32_e32 [[PTRREG:v[0-9]+]], vcc, 64
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; SI-PROMOTE: ds_write_b32 [[PTRREG]]
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define void @test_private_array_ptr_calc(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %inA, i32 addrspace(1)* noalias %inB) #0 {
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%alloca = alloca [16 x i32], align 16
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%tid = call i32 @llvm.SI.tid() readnone
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%a_ptr = getelementptr inbounds i32, i32 addrspace(1)* %inA, i32 %tid
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%b_ptr = getelementptr inbounds i32, i32 addrspace(1)* %inB, i32 %tid
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%a = load i32, i32 addrspace(1)* %a_ptr
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%b = load i32, i32 addrspace(1)* %b_ptr
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%result = add i32 %a, %b
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%alloca_ptr = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 1, i32 %b
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store i32 %result, i32* %alloca_ptr, align 4
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; Dummy call
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call void @llvm.AMDGPU.barrier.local() nounwind convergent
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%reload = load i32, i32* %alloca_ptr, align 4
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%out_ptr = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
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store i32 %reload, i32 addrspace(1)* %out_ptr, align 4
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ret void
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}
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