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llvm/test/CodeGen/MIR/ARM
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Adrian Prantl 6932e6dcc1 Convert the CodeGen/ARM/sched-it-debug-nodes.ll testcase from IR -> MIR.
NFC
PR24563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256187 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-21 19:44:42 +00:00
..
ARMLoadStoreDBG.mir
Teach ARMLoadStoreOptimizer to ignore DBG_VALUE instructions when merging
2015-12-21 19:25:03 +00:00
bundled-instructions.mir
MIR Serialization: Serialize the 'internal' register operand flag.
2015-08-14 19:07:07 +00:00
cfi-same-value.mir
MIR Serialization: Serialize the '.cfi_same_value' CFI directive.
2015-08-14 21:55:58 +00:00
expected-closing-brace.mir
…
extraneous-closing-brace-error.mir
…
lit.local.cfg
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nested-instruction-bundle-error.mir
…
sched-it-debug-nodes.mir
Convert the CodeGen/ARM/sched-it-debug-nodes.ll testcase from IR -> MIR.
2015-12-21 19:44:42 +00:00
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