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llvm/lib/Target/AMDGPU/Disassembler
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Dmitry Preobrazhensky c428d374bf [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers
See bug 35561: https://bugs.llvm.org/show_bug.cgi?id=35561

This patch also affects implementation of SGPR and VGPR registers though changes are cosmetic.

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D41437

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321359 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-22 15:18:06 +00:00
..
AMDGPUDisassembler.cpp
[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers
2017-12-22 15:18:06 +00:00
AMDGPUDisassembler.h
[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers
2017-12-22 15:18:06 +00:00
CMakeLists.txt
[AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc.
2016-05-26 17:00:33 +00:00
LLVMBuild.txt
…
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