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https://github.com/RPCS3/llvm.git
synced 2026-08-28 05:10:05 -04:00
Alex Bradbury
ff43d39338
This patch switches the default for -riscv-no-aliases to false and updates all affected MC and CodeGen tests. As recommended in D41071, MC tests use the canonical instructions and the CodeGen tests use the aliases. Additionally, for the f and d instructions with rounding mode, the tests for the aliased versions are moved and tightened such that they can actually detect if alias emission is enabled. (see D40902 for context) Differential Revision: https://reviews.llvm.org/D41225 Patch by Mario Werner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320797 91177308-0d34-0410-b5e6-96231b3b80d8
198 lines
5.9 KiB
LLVM
198 lines
5.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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declare i32 @external_function(i32)
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define i32 @test_call_external(i32 %a) nounwind {
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; RV32I-LABEL: test_call_external:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lui a1, %hi(external_function)
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; RV32I-NEXT: addi a1, a1, %lo(external_function)
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; RV32I-NEXT: jalr a1
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = call i32 @external_function(i32 %a)
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ret i32 %1
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}
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define i32 @defined_function(i32 %a) nounwind {
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; RV32I-LABEL: defined_function:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: addi a0, a0, 1
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = add i32 %a, 1
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ret i32 %1
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}
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define i32 @test_call_defined(i32 %a) nounwind {
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; RV32I-LABEL: test_call_defined:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lui a1, %hi(defined_function)
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; RV32I-NEXT: addi a1, a1, %lo(defined_function)
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; RV32I-NEXT: jalr a1
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = call i32 @defined_function(i32 %a)
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ret i32 %1
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}
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define i32 @test_call_indirect(i32 (i32)* %a, i32 %b) nounwind {
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; RV32I-LABEL: test_call_indirect:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: mv a2, a0
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; RV32I-NEXT: mv a0, a1
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = call i32 %a(i32 %b)
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ret i32 %1
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}
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; Ensure that calls to fastcc functions aren't rejected. Such calls may be
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; introduced when compiling with optimisation.
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define fastcc i32 @fastcc_function(i32 %a, i32 %b) nounwind {
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; RV32I-LABEL: fastcc_function:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: add a0, a0, a1
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = add i32 %a, %b
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ret i32 %1
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}
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define i32 @test_call_fastcc(i32 %a, i32 %b) nounwind {
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; RV32I-LABEL: test_call_fastcc:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: sw s1, 4(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: mv s1, a0
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; RV32I-NEXT: lui a0, %hi(fastcc_function)
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; RV32I-NEXT: addi a2, a0, %lo(fastcc_function)
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; RV32I-NEXT: mv a0, s1
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: mv a0, s1
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; RV32I-NEXT: lw s1, 4(sp)
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = call fastcc i32 @fastcc_function(i32 %a, i32 %b)
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ret i32 %a
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}
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declare i32 @external_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind
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define i32 @test_call_external_many_args(i32 %a) nounwind {
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; RV32I-LABEL: test_call_external_many_args:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -32
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; RV32I-NEXT: sw ra, 28(sp)
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; RV32I-NEXT: sw s0, 24(sp)
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; RV32I-NEXT: sw s1, 20(sp)
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; RV32I-NEXT: addi s0, sp, 32
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; RV32I-NEXT: mv s1, a0
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; RV32I-NEXT: sw s1, 4(sp)
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; RV32I-NEXT: sw s1, 0(sp)
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; RV32I-NEXT: lui a0, %hi(external_many_args)
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; RV32I-NEXT: addi t0, a0, %lo(external_many_args)
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; RV32I-NEXT: mv a0, s1
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; RV32I-NEXT: mv a1, s1
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; RV32I-NEXT: mv a2, s1
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; RV32I-NEXT: mv a3, s1
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; RV32I-NEXT: mv a4, s1
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; RV32I-NEXT: mv a5, s1
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; RV32I-NEXT: mv a6, s1
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; RV32I-NEXT: mv a7, s1
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; RV32I-NEXT: jalr t0
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; RV32I-NEXT: mv a0, s1
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; RV32I-NEXT: lw s1, 20(sp)
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; RV32I-NEXT: lw s0, 24(sp)
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; RV32I-NEXT: lw ra, 28(sp)
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; RV32I-NEXT: addi sp, sp, 32
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; RV32I-NEXT: ret
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%1 = call i32 @external_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
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i32 %a, i32 %a, i32 %a, i32 %a, i32 %a)
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ret i32 %a
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}
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define i32 @defined_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 %j) nounwind {
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; RV32I-LABEL: defined_many_args:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lw a0, 4(s0)
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; RV32I-NEXT: addi a0, a0, 1
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%added = add i32 %j, 1
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ret i32 %added
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}
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define i32 @test_call_defined_many_args(i32 %a) nounwind {
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; RV32I-LABEL: test_call_defined_many_args:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -32
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; RV32I-NEXT: sw ra, 28(sp)
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; RV32I-NEXT: sw s0, 24(sp)
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; RV32I-NEXT: addi s0, sp, 32
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; RV32I-NEXT: sw a0, 4(sp)
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; RV32I-NEXT: sw a0, 0(sp)
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; RV32I-NEXT: lui a1, %hi(defined_many_args)
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; RV32I-NEXT: addi t0, a1, %lo(defined_many_args)
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; RV32I-NEXT: mv a1, a0
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; RV32I-NEXT: mv a2, a0
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; RV32I-NEXT: mv a3, a0
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; RV32I-NEXT: mv a4, a0
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; RV32I-NEXT: mv a5, a0
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; RV32I-NEXT: mv a6, a0
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; RV32I-NEXT: mv a7, a0
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; RV32I-NEXT: jalr t0
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; RV32I-NEXT: lw s0, 24(sp)
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; RV32I-NEXT: lw ra, 28(sp)
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; RV32I-NEXT: addi sp, sp, 32
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; RV32I-NEXT: ret
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%1 = call i32 @defined_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
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i32 %a, i32 %a, i32 %a, i32 %a, i32 %a)
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ret i32 %1
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}
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