mirror of
https://github.com/RPCS3/llvm.git
synced 2026-07-21 11:15:29 -04:00
Alex Bradbury
5f9771e742
%lo(), %hi(), and %pcrel_hi() are supported and test cases have been added to ensure the appropriate fixups and relocations are generated. I've added an instruction format field which is used in RISCVMCCodeEmitter to, for instance, tell whether it should emit a lo12_i fixup or a lo12_s fixup (RISC-V has two 12-bit immediate encodings depending on the instruction type). Differential Revision: https://reviews.llvm.org/D23568 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314389 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
2.8 KiB
C++
100 lines
2.8 KiB
C++
//===-- RISCVMCExpr.cpp - RISCV specific MC expression classes ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the implementation of the assembly expression modifiers
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// accepted by the RISCV architecture (e.g. ":lo12:", ":gottprel_g1:", ...).
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//
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//===----------------------------------------------------------------------===//
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#include "RISCVMCExpr.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbolELF.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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#define DEBUG_TYPE "riscvmcexpr"
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const RISCVMCExpr *RISCVMCExpr::create(const MCExpr *Expr, VariantKind Kind,
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MCContext &Ctx) {
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return new (Ctx) RISCVMCExpr(Expr, Kind);
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}
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void RISCVMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
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bool HasVariant = getKind() != VK_RISCV_None;
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if (HasVariant)
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OS << '%' << getVariantKindName(getKind()) << '(';
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Expr->print(OS, MAI);
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if (HasVariant)
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OS << ')';
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}
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bool RISCVMCExpr::evaluateAsRelocatableImpl(MCValue &Res,
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const MCAsmLayout *Layout,
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const MCFixup *Fixup) const {
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return getSubExpr()->evaluateAsRelocatable(Res, Layout, Fixup);
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}
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void RISCVMCExpr::visitUsedExpr(MCStreamer &Streamer) const {
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Streamer.visitUsedExpr(*getSubExpr());
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}
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RISCVMCExpr::VariantKind RISCVMCExpr::getVariantKindForName(StringRef name) {
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return StringSwitch<RISCVMCExpr::VariantKind>(name)
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.Case("lo", VK_RISCV_LO)
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.Case("hi", VK_RISCV_HI)
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.Case("pcrel_hi", VK_RISCV_PCREL_HI)
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.Default(VK_RISCV_Invalid);
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}
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StringRef RISCVMCExpr::getVariantKindName(VariantKind Kind) {
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switch (Kind) {
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default:
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llvm_unreachable("Invalid ELF symbol kind");
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case VK_RISCV_LO:
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return "lo";
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case VK_RISCV_HI:
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return "hi";
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case VK_RISCV_PCREL_HI:
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return "pcrel_hi";
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}
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}
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bool RISCVMCExpr::evaluateAsConstant(int64_t &Res) const {
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MCValue Value;
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if (Kind == VK_RISCV_PCREL_HI)
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return false;
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if (!getSubExpr()->evaluateAsRelocatable(Value, nullptr, nullptr))
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return false;
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if (!Value.isAbsolute())
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return false;
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Res = evaluateAsInt64(Value.getConstant());
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return true;
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}
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int64_t RISCVMCExpr::evaluateAsInt64(int64_t Value) const {
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switch (Kind) {
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default:
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llvm_unreachable("Invalid kind");
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case VK_RISCV_LO:
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return SignExtend64<12>(Value);
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case VK_RISCV_HI:
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// Add 1 if bit 11 is 1, to compensate for low 12 bits being negative.
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return ((Value + 0x800) >> 12) & 0xfffff;
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}
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}
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