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https://github.com/RPCS3/llvm.git
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Simon Pilgrim
fd99b11893
Extension to rL315155, generate constant shifts on 64-bits as well as 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315156 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
1.2 KiB
LLVM
33 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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define void @PR34855(<2 x i32> *%p0, <2 x i32> *%p1, <2 x i32> *%p2) {
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; X86-LABEL: PR34855:
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; X86: # BB#0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X86-NEXT: movlps %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: PR34855:
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; X64: # BB#0:
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; X64-NEXT: movslq 4(%rdi), %rax
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; X64-NEXT: movq %rax, %xmm0
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; X64-NEXT: movslq (%rdi), %rax
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; X64-NEXT: movq %rax, %xmm1
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; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
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; X64-NEXT: movq %xmm0, (%rdx)
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; X64-NEXT: retq
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%tmp = load <2 x i32>, <2 x i32>* %p0, align 8
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%tmp1 = load <2 x i32>, <2 x i32>* %p1, align 8
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%mul = mul <2 x i32> zeroinitializer, %tmp1
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%mul1 = mul <2 x i32> <i32 -8190, i32 -8190>, %mul
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%mul2 = mul <2 x i32> <i32 3, i32 3>, %mul1
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%shr = ashr <2 x i32> %tmp, %mul2
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store <2 x i32> %shr, <2 x i32>* %p2, align 8
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ret void
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}
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