mirror of
https://github.com/RPCS3/llvm.git
synced 2026-07-22 03:35:35 -04:00
Craig Topper
c7efeba668
Summary: X86ISelDAGToDAG tries to analyze ANDs compared with 0 to optimize to narrower immediates using subregisters. I don't think we should be optimizing to 16-bit test instructions. It goes against our normal behavior of promoting i16 operations to i32. It only saves one byte due to the need to add a 0x66 prefix. I think it would also be subject to a length changing prefix penalty in the decoders on Intel CPUs. Reviewers: RKSimon, zvi, spatel Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38273 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314474 91177308-0d34-0410-b5e6-96231b3b80d8
194 lines
3.8 KiB
LLVM
194 lines
3.8 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64
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; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64
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; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32
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; CHECK-64-LABEL: g64xh:
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; CHECK-64: btl $11
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; CHECK-64: ret
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; CHECK-32-LABEL: g64xh:
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; CHECK-32: btl $11
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; CHECK-32: ret
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define void @g64xh(i64 inreg %x) nounwind {
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%t = and i64 %x, 2048
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%s = icmp eq i64 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g64xl:
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; CHECK-64: testb $8, [[A0L:%dil|%cl]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g64xl:
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; CHECK-32: testb $8, %al
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; CHECK-32: ret
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define void @g64xl(i64 inreg %x) nounwind {
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%t = and i64 %x, 8
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%s = icmp eq i64 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g32xh:
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; CHECK-64: btl $11
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; CHECK-64: ret
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; CHECK-32-LABEL: g32xh:
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; CHECK-32: btl $11
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; CHECK-32: ret
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define void @g32xh(i32 inreg %x) nounwind {
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%t = and i32 %x, 2048
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%s = icmp eq i32 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g32xl:
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; CHECK-64: testb $8, [[A0L]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g32xl:
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; CHECK-32: testb $8, %al
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; CHECK-32: ret
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define void @g32xl(i32 inreg %x) nounwind {
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%t = and i32 %x, 8
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%s = icmp eq i32 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g16xh:
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; CHECK-64: btl $11
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; CHECK-64: ret
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; CHECK-32-LABEL: g16xh:
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; CHECK-32: btl $11
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; CHECK-32: ret
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define void @g16xh(i16 inreg %x) nounwind {
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%t = and i16 %x, 2048
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%s = icmp eq i16 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g16xl:
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; CHECK-64: testb $8, [[A0L]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g16xl:
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; CHECK-32: testb $8, %al
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; CHECK-32: ret
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define void @g16xl(i16 inreg %x) nounwind {
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%t = and i16 %x, 8
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%s = icmp eq i16 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g64x16:
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; CHECK-64: testl $32896, %[[A0D:edi|ecx]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g64x16:
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; CHECK-32: testl $32896, %eax
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; CHECK-32: ret
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define void @g64x16(i64 inreg %x) nounwind {
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%t = and i64 %x, 32896
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%s = icmp eq i64 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g64x16minsize:
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; CHECK-64: testw $-32640, %[[A0W:di|cx]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g64x16minsize:
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; CHECK-32: testw $-32640, %ax
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; CHECK-32: ret
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define void @g64x16minsize(i64 inreg %x) nounwind minsize {
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%t = and i64 %x, 32896
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%s = icmp eq i64 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g32x16:
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; CHECK-64: testl $32896, %[[A0D]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g32x16:
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; CHECK-32: testl $32896, %eax
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; CHECK-32: ret
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define void @g32x16(i32 inreg %x) nounwind {
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%t = and i32 %x, 32896
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%s = icmp eq i32 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g32x16minsize:
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; CHECK-64: testw $-32640, %[[A0W]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g32x16minsize:
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; CHECK-32: testw $-32640, %ax
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; CHECK-32: ret
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define void @g32x16minsize(i32 inreg %x) nounwind minsize {
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%t = and i32 %x, 32896
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%s = icmp eq i32 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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; CHECK-64-LABEL: g64x32:
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; CHECK-64: testl $268468352, %[[A0D]]
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; CHECK-64: ret
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; CHECK-32-LABEL: g64x32:
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; CHECK-32: testl $268468352, %eax
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; CHECK-32: ret
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define void @g64x32(i64 inreg %x) nounwind {
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%t = and i64 %x, 268468352
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%s = icmp eq i64 %t, 0
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br i1 %s, label %yes, label %no
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yes:
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call void @bar()
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ret void
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no:
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ret void
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}
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declare void @bar()
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