Florian Hahn 9983524662 [AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ ...

Patch [5/5] in a series to add assembler/disassembler support for AArch64 SVE unpredicated ADD/SUB instructions.

Patch by Sander De Smalen.

Reviewed by: rengolin

Differential Revision: https://reviews.llvm.org/D39091


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317591 91177308-0d34-0410-b5e6-96231b3b80d8

2017-11-07 16:58:13 +00:00

..

AArch64

[AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ

2017-11-07 16:58:13 +00:00

AMDGPU

AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency

2017-10-18 17:31:09 +00:00

ARM

[ARM] Tighten up CHECK lines in a test

2017-10-24 14:20:13 +00:00

AsmParser

Give a test a triple

2017-10-10 01:34:31 +00:00

AVR

[AVR] Remove a bunch of now-obselete tests

2017-07-01 05:23:13 +00:00

BPF

bpf: fix an insn encoding issue for neg insn

2017-10-04 16:11:52 +00:00

COFF

[codeview] Implement FPO data assembler directives

2017-10-11 21:24:33 +00:00

Disassembler

[mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version

2017-11-06 12:59:53 +00:00

ELF

llvm-dwarfdump: Make -brief the default and add a -verbose option instead.

2017-09-11 23:05:20 +00:00

Hexagon

[Hexagon] New HVX target features.

2017-10-18 18:07:07 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

[dwarfdump] Add verbose output for .debug-line section

2017-09-21 20:15:30 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

[mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version

2017-11-06 12:59:53 +00:00

PowerPC

PowerPC: support the separator character in the IAS

2017-10-24 16:19:56 +00:00

RISCV

[RISCV] RISCVAsmParser: early exit if RISCVOperand isn't immediate as expected

2017-10-19 16:22:51 +00:00

Sparc

[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed

2017-07-25 15:28:28 +00:00

SystemZ

[SystemZ, AsmParser] Enable the mnemonic spell corrector.

2017-07-18 09:17:00 +00:00

WebAssembly

[WebAssembly] MC: Don't allow zero sized data segments

2017-10-27 00:08:55 +00:00

X86

[X86][AsmParser] Treat '%' as the modulo operator under Intel syntax

2017-10-31 16:47:38 +00:00