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https://github.com/RPCS3/llvm.git
synced 2026-07-21 03:05:26 -04:00
Teresa Johnson
005cfad2e8
Summary: vectorizer-maximize-bandwidth is generally useful in terms of performance. I've tested the impact of changing this to default on speccpu benchmarks on sandybridge machines. The result shows non-negative impact: spec/2006/fp/C++/444.namd 26.84 -0.31% spec/2006/fp/C++/447.dealII 46.19 +0.89% spec/2006/fp/C++/450.soplex 42.92 -0.44% spec/2006/fp/C++/453.povray 38.57 -2.25% spec/2006/fp/C/433.milc 24.54 -0.76% spec/2006/fp/C/470.lbm 41.08 +0.26% spec/2006/fp/C/482.sphinx3 47.58 -0.99% spec/2006/int/C++/471.omnetpp 22.06 +1.87% spec/2006/int/C++/473.astar 22.65 -0.12% spec/2006/int/C++/483.xalancbmk 33.69 +4.97% spec/2006/int/C/400.perlbench 33.43 +1.70% spec/2006/int/C/401.bzip2 23.02 -0.19% spec/2006/int/C/403.gcc 32.57 -0.43% spec/2006/int/C/429.mcf 40.35 +0.27% spec/2006/int/C/445.gobmk 26.96 +0.06% spec/2006/int/C/456.hmmer 24.4 +0.19% spec/2006/int/C/458.sjeng 27.91 -0.08% spec/2006/int/C/462.libquantum 57.47 -0.20% spec/2006/int/C/464.h264ref 46.52 +1.35% geometric mean +0.29% The regression on 453.povray seems real, but is due to secondary effects as all hot functions are bit-identical with and without the flag. I started this patch to consult upstream opinions on this. It will be greatly appreciated if the community can help test the performance impact of this change on other architectures so that we can decided if this should be target-dependent. Reviewers: hfinkel, mkuper, davidxl, chandlerc Reviewed By: chandlerc Subscribers: rengolin, sanjoy, javed.absar, bjope, dorit, magabari, RKSimon, llvm-commits, mzolotukhin Differential Revision: https://reviews.llvm.org/D33341 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306933 91177308-0d34-0410-b5e6-96231b3b80d8
61 lines
2.3 KiB
LLVM
61 lines
2.3 KiB
LLVM
; RUN: opt < %s -loop-vectorize -mtriple=thumbv7-apple-ios3.0.0 -mcpu=swift -S -dce | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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target triple = "thumbv7-apple-ios3.0.0"
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@b = common global [2048 x i32] zeroinitializer, align 16
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@c = common global [2048 x i32] zeroinitializer, align 16
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@a = common global [2048 x i32] zeroinitializer, align 16
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; Select VF = 8;
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;CHECK-LABEL: @example1(
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;CHECK: load <4 x i32>
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;CHECK: add nsw <4 x i32>
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;CHECK: store <4 x i32>
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;CHECK: ret void
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define void @example1() nounwind uwtable ssp {
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br label %1
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; <label>:1 ; preds = %1, %0
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%indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %1 ]
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%2 = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 %indvars.iv
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%3 = load i32, i32* %2, align 4
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%4 = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 %indvars.iv
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%5 = load i32, i32* %4, align 4
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%6 = add nsw i32 %5, %3
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%7 = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 %indvars.iv
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store i32 %6, i32* %7, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 256
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br i1 %exitcond, label %8, label %1
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; <label>:8 ; preds = %1
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ret void
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}
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;CHECK-LABEL: @example10b(
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;CHECK: load <8 x i16>
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;CHECK: sext <8 x i16>
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;CHECK: store <8 x i32>
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;CHECK: ret void
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define void @example10b(i16* noalias nocapture %sa, i16* noalias nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32* noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp {
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br label %1
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; <label>:1 ; preds = %1, %0
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%indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %1 ]
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%2 = getelementptr inbounds i16, i16* %sb, i64 %indvars.iv
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%3 = load i16, i16* %2, align 2
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%4 = sext i16 %3 to i32
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%5 = getelementptr inbounds i32, i32* %ia, i64 %indvars.iv
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store i32 %4, i32* %5, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 1024
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br i1 %exitcond, label %6, label %1
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; <label>:6 ; preds = %1
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ret void
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}
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