mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-27 14:45:50 +00:00
b53495606d
creation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218169 91177308-0d34-0410-b5e6-96231b3b80d8
83 lines
3.0 KiB
C++
83 lines
3.0 KiB
C++
//===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// Subclass of MipsTargetLowering specialized for mips16.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
|
|
#define LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
|
|
|
|
#include "MipsISelLowering.h"
|
|
|
|
namespace llvm {
|
|
class Mips16TargetLowering : public MipsTargetLowering {
|
|
public:
|
|
explicit Mips16TargetLowering(const MipsTargetMachine &TM,
|
|
const MipsSubtarget &STI);
|
|
|
|
bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
|
|
unsigned Align,
|
|
bool *Fast) const override;
|
|
|
|
MachineBasicBlock *
|
|
EmitInstrWithCustomInserter(MachineInstr *MI,
|
|
MachineBasicBlock *MBB) const override;
|
|
|
|
private:
|
|
bool isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
|
|
unsigned NextStackOffset,
|
|
const MipsFunctionInfo& FI) const override;
|
|
|
|
void setMips16HardFloatLibCalls();
|
|
|
|
unsigned int
|
|
getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
|
|
|
|
const char *getMips16HelperFunction
|
|
(Type* RetTy, ArgListTy &Args, bool &needHelper) const;
|
|
|
|
void
|
|
getOpndList(SmallVectorImpl<SDValue> &Ops,
|
|
std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
|
|
bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
|
|
CallLoweringInfo &CLI, SDValue Callee,
|
|
SDValue Chain) const override;
|
|
|
|
MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI,
|
|
MachineBasicBlock *BB) const;
|
|
|
|
MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
|
|
MachineInstr *MI,
|
|
MachineBasicBlock *BB) const;
|
|
|
|
MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
|
|
MachineInstr *MI,
|
|
MachineBasicBlock *BB) const;
|
|
|
|
MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
|
|
MachineInstr *MI,
|
|
MachineBasicBlock *BB) const;
|
|
|
|
MachineBasicBlock *emitFEXT_T8I8I16_ins(
|
|
unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, bool ImmSigned,
|
|
MachineInstr *MI, MachineBasicBlock *BB) const;
|
|
|
|
MachineBasicBlock *emitFEXT_CCRX16_ins(
|
|
unsigned SltOpc,
|
|
MachineInstr *MI, MachineBasicBlock *BB) const;
|
|
|
|
MachineBasicBlock *emitFEXT_CCRXI16_ins(
|
|
unsigned SltiOpc, unsigned SltiXOpc,
|
|
MachineInstr *MI, MachineBasicBlock *BB )const;
|
|
};
|
|
}
|
|
|
|
#endif
|