mirror of
https://github.com/RPCS3/llvm.git
synced 2025-05-14 09:26:22 +00:00
01a542927d
Move the register stackification and coloring passes to run very late, after PEI, tail duplication, and most other passes. This means that all code emitted and expanded by those passes is now exposed to these passes. This also eliminates the need for prologue/epilogue code to be manually stackified, which significantly simplifies the code. This does require running LiveIntervals a second time. It's useful to think of these late passes not as late optimization passes, but as a domain-specific compression algorithm based on knowledge of liveness information. It's used to compress the code after all conventional optimizations are complete, which is why it uses LiveIntervals at a phase when actual optimization passes don't typically need it. Differential Revision: http://reviews.llvm.org/D20075 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269012 91177308-0d34-0410-b5e6-96231b3b80d8
94 lines
3.3 KiB
C++
94 lines
3.3 KiB
C++
// WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
///
|
|
/// \file
|
|
/// \brief This file declares WebAssembly-specific per-machine-function
|
|
/// information.
|
|
///
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
|
|
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
|
|
|
|
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
|
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
|
|
|
namespace llvm {
|
|
|
|
/// This class is derived from MachineFunctionInfo and contains private
|
|
/// WebAssembly-specific information for each MachineFunction.
|
|
class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
|
|
MachineFunction &MF;
|
|
|
|
std::vector<MVT> Params;
|
|
|
|
/// A mapping from CodeGen vreg index to WebAssembly register number.
|
|
std::vector<unsigned> WARegs;
|
|
|
|
/// A mapping from CodeGen vreg index to a boolean value indicating whether
|
|
/// the given register is considered to be "stackified", meaning it has been
|
|
/// determined or made to meet the stack requirements:
|
|
/// - single use (per path)
|
|
/// - single def (per path)
|
|
/// - defined and used in LIFO order with other stack registers
|
|
BitVector VRegStackified;
|
|
|
|
// A virtual register holding the pointer to the vararg buffer for vararg
|
|
// functions. It is created and set in TLI::LowerFormalArguments and read by
|
|
// TLI::LowerVASTART
|
|
unsigned VarargVreg = -1U;
|
|
|
|
public:
|
|
explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
|
|
~WebAssemblyFunctionInfo() override;
|
|
|
|
void addParam(MVT VT) { Params.push_back(VT); }
|
|
const std::vector<MVT> &getParams() const { return Params; }
|
|
|
|
unsigned getVarargBufferVreg() const {
|
|
assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
|
|
return VarargVreg;
|
|
}
|
|
void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
|
|
|
|
static const unsigned UnusedReg = -1u;
|
|
|
|
void stackifyVReg(unsigned VReg) {
|
|
if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
|
|
VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1);
|
|
VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg));
|
|
}
|
|
bool isVRegStackified(unsigned VReg) const {
|
|
if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
|
|
return false;
|
|
return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg));
|
|
}
|
|
|
|
void initWARegs();
|
|
void setWAReg(unsigned VReg, unsigned WAReg) {
|
|
assert(WAReg != UnusedReg);
|
|
assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size());
|
|
WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
|
|
}
|
|
unsigned getWAReg(unsigned Reg) const {
|
|
assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size());
|
|
return WARegs[TargetRegisterInfo::virtReg2Index(Reg)];
|
|
}
|
|
// If new virtual registers are created after initWARegs has been called,
|
|
// this function can be used to add WebAssembly register mappings for them.
|
|
void addWAReg(unsigned VReg, unsigned WAReg) {
|
|
assert(VReg = WARegs.size());
|
|
WARegs.push_back(WAReg);
|
|
}
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif
|