llvm/test/CodeGen
Pete Cooper 02e5fb0f58 Added missing newline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:03:24 +00:00
..
ARM Simplify some uses of utohexstr. 2011-11-07 21:00:59 +00:00
CBackend Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 2011-09-26 06:44:27 +00:00
CellSPU Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
CPP manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Generic Remove the the test which checks the saving of a vector of booleans into memory. 2011-10-16 19:06:06 +00:00
MBlaze Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
Mips Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
MSP430 Remove the explicit request for "Latency" scheduling from MSP430, 2011-10-24 17:53:16 +00:00
PowerPC test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now. 2011-10-28 23:11:03 +00:00
PTX fixed global array handling for ptx to use the correct bit widths 2011-11-03 19:24:46 +00:00
SPARC make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
Thumb Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
Thumb2 ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
X86 Added missing newline 2011-11-08 00:03:24 +00:00
XCore Don't fold negative offsets into cp / dp accesses to avoid relocation errors. 2011-11-01 11:31:53 +00:00