Akira Hatanaka 03d830e4f9 Fix LowerBlockAddress to produce instructions with the correct relocation ... types for N32 ABI and update test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154031 91177308-0d34-0410-b5e6-96231b3b80d8		2012-04-04 18:22:53 +00:00
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ARM	Allocate virtual registers in ascending order.	2012-04-02 22:30:39 +00:00
CellSPU	This commit contains a few changes that had to go in together.	2012-04-01 19:31:22 +00:00
CPP	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Generic	Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095>	2012-04-03 22:57:55 +00:00
Hexagon	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	Fix LowerBlockAddress to produce instructions with the correct relocation	2012-04-04 18:22:53 +00:00
MSP430	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
PowerPC	Enable prefetch generation on PPC64.	2012-04-01 20:08:17 +00:00
PTX	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
SPARC	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Thumb	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Thumb2	Don't kill the base register when expanding strd.	2012-03-28 23:07:03 +00:00
X86	Add an additional testcase which checks ops with multiple users.	2012-04-03 07:39:36 +00:00
XCore	No need to run llvm-as.	2012-04-02 19:44:20 +00:00