Tim Northover 07786c2f09 AArch64 & ARM: refactor crypto intrinsics to take scalars ... Some of the SHA instructions take a scalar i32 as one argument (largely because they work on 160-bit hash fragments). This wasn't reflected in the IR previously, with ARM and AArch64 choosing different types (<4 x i32> and <1 x i32> respectively) which was ugly. This makes all the affected intrinsics take a uniform "i32", allowing them to become non-polymorphic at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200706 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-03 17:27:49 +00:00
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AArch64	AArch64 & ARM: refactor crypto intrinsics to take scalars	2014-02-03 17:27:49 +00:00
ARM	AArch64 & ARM: refactor crypto intrinsics to take scalars	2014-02-03 17:27:49 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	Additional fix for 200201: due to dependence on bitwidth test was moved to X86 directory.	2014-01-27 09:43:10 +00:00
Hexagon
Inputs
Mips	[mips][msa] Add insert.d instruction.	2014-01-31 13:31:20 +00:00
MSP430	Fix known typos	2014-01-24 17:20:08 +00:00
NVPTX	[NVPTX] Fix emitting aggregate parameters	2014-01-28 18:35:29 +00:00
PowerPC	Handle spilling the PPC GPRC_NOR0 register class	2014-01-28 05:32:58 +00:00
R600	Add some xfailed R600 tests for 64-bit private accesses.	2014-02-02 00:13:12 +00:00
SPARC	[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.	2014-02-01 18:54:16 +00:00
SystemZ	XFAIL test/CodeGen/SystemZ/alias-01.ll which requires CodeGen TBAA	2014-01-25 19:31:44 +00:00
Thumb	CodeGen: Stop treating vectors as aggregates	2014-01-21 22:46:46 +00:00
Thumb2	PGO branch weight: update edge weights in IfConverter.	2014-01-29 23:18:47 +00:00
X86	Expand vector bswap in LegalizeVectorOps	2014-02-03 17:27:25 +00:00
XCore	Fix broken CHECK lines.	2014-01-11 21:06:00 +00:00