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09da6b5540
Still only 32-bit ARM using it at this stage, but the promotion allows direct testing via opt and is a reasonably self-contained patch on the way to switching ARM64. At this point, other targets should be able to make use of it without too much difficulty if they want. (See ARM64 commit coming soon for an example). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206485 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.8 KiB
C++
58 lines
1.8 KiB
C++
//===-- ARM.h - Top-level interface for ARM representation ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// ARM back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_ARM_H
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#define TARGET_ARM_H
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#include "llvm/Support/CodeGen.h"
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namespace llvm {
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class ARMAsmPrinter;
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class ARMBaseTargetMachine;
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class FunctionPass;
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class ImmutablePass;
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class JITCodeEmitter;
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class MachineInstr;
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class MCInst;
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class TargetLowering;
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class TargetMachine;
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FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
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JITCodeEmitter &JCE);
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FunctionPass *createA15SDOptimizerPass();
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FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
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FunctionPass *createARMExpandPseudoPass();
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FunctionPass *createARMGlobalBaseRegPass();
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FunctionPass *createARMGlobalMergePass(const TargetLowering* tli);
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FunctionPass *createARMConstantIslandPass();
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FunctionPass *createMLxExpansionPass();
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FunctionPass *createThumb2ITBlockPass();
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FunctionPass *createARMOptimizeBarriersPass();
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FunctionPass *createThumb2SizeReductionPass();
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/// \brief Creates an ARM-specific Target Transformation Info pass.
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ImmutablePass *createARMTargetTransformInfoPass(const ARMBaseTargetMachine *TM);
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void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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ARMAsmPrinter &AP);
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} // end namespace llvm;
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#endif
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