Jack Carter 0b9675d631 Mips specific inline assembler constraint 'R' ...

'R' An address that can be sued in a non-macro load or store.
This patch includes a positive test case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176452 91177308-0d34-0410-b5e6-96231b3b80d8

2013-03-04 21:33:15 +00:00

..

AArch64

AArch64: be more careful resorting to inefficient addressing for weak vars.

2013-02-28 14:36:31 +00:00

ARM

ARM NEON: Fix v2f32 float intrinsics

2013-03-02 19:38:33 +00:00

CPP

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Generic

For inline asm:

2013-01-11 18:12:39 +00:00

Hexagon

Hexagon: Add constant extender support framework.

2013-03-01 17:37:13 +00:00

MBlaze

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Mips

Mips specific inline assembler constraint 'R'

2013-03-04 21:33:15 +00:00

MSP430

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NVPTX

[NVPTX] Disable vector registers

2013-02-12 14:18:49 +00:00

PowerPC

Fix PR15332 (patch by Florian Zeitz).

2013-02-26 21:28:57 +00:00

R600

R600/SI: fix sampler tests after fixing wait insertions

2013-03-01 17:39:05 +00:00

SI

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SPARC

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Thumb

Reapply r176381, writing the CHECKs in a more forgiving manner to account for

2013-03-04 18:20:31 +00:00

Thumb2

ARM: Creating a vector from a lane of another.

2013-03-02 20:16:24 +00:00

X86

Bypass Slow Divides

2013-03-04 18:13:57 +00:00

XCore

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