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19f2ffce45
immediate in small code model. The JIT cannot ensure GV's are placed in the lower 4G. - Some preliminary support for large code model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32215 91177308-0d34-0410-b5e6-96231b3b80d8
332 lines
11 KiB
C++
332 lines
11 KiB
C++
//===-- X86JITInfo.cpp - Implement the JIT interfaces for the X86 target --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the JIT interfaces for the X86 target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "jit"
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#include "X86JITInfo.h"
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#include "X86Relocations.h"
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#include "X86Subtarget.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/Config/alloca.h"
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#include <cstdlib>
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using namespace llvm;
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#ifdef _MSC_VER
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extern "C" void *_AddressOfReturnAddress(void);
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#pragma intrinsic(_AddressOfReturnAddress)
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#endif
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void X86JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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unsigned char *OldByte = (unsigned char *)Old;
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*OldByte++ = 0xE9; // Emit JMP opcode.
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unsigned *OldWord = (unsigned *)OldByte;
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unsigned NewAddr = (intptr_t)New;
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unsigned OldAddr = (intptr_t)OldWord;
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*OldWord = NewAddr - OldAddr - 4; // Emit PC-relative addr of New code.
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}
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/// JITCompilerFunction - This contains the address of the JIT function used to
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/// compile a function lazily.
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static TargetJITInfo::JITCompilerFn JITCompilerFunction;
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// Get the ASMPREFIX for the current host. This is often '_'.
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#ifndef __USER_LABEL_PREFIX__
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#define __USER_LABEL_PREFIX__
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#endif
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#define GETASMPREFIX2(X) #X
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#define GETASMPREFIX(X) GETASMPREFIX2(X)
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#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
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// Provide a wrapper for X86CompilationCallback2 that saves non-traditional
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// callee saved registers, for the fastcc calling convention.
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extern "C" {
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#if defined(__x86_64__)
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// No need to save EAX/EDX for X86-64.
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void X86CompilationCallback(void);
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asm(
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".text\n"
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".align 8\n"
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".globl " ASMPREFIX "X86CompilationCallback\n"
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ASMPREFIX "X86CompilationCallback:\n"
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// Save RBP
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"pushq %rbp\n"
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// Save RSP
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"movq %rsp, %rbp\n"
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// Save all int arg registers
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"pushq %rdi\n"
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"pushq %rsi\n"
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"pushq %rdx\n"
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"pushq %rcx\n"
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"pushq %r8\n"
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"pushq %r9\n"
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// Align stack on 16-byte boundary. ESP might not be properly aligned
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// (8 byte) if this is called from an indirect stub.
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"andq $-16, %rsp\n"
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// Save all XMM arg registers
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"subq $128, %rsp\n"
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"movaps %xmm0, (%rsp)\n"
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"movaps %xmm1, 16(%rsp)\n"
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"movaps %xmm2, 32(%rsp)\n"
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"movaps %xmm3, 48(%rsp)\n"
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"movaps %xmm4, 64(%rsp)\n"
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"movaps %xmm5, 80(%rsp)\n"
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"movaps %xmm6, 96(%rsp)\n"
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"movaps %xmm7, 112(%rsp)\n"
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// JIT callee
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"movq %rbp, %rdi\n" // Pass prev frame and return address
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"movq 8(%rbp), %rsi\n"
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"call " ASMPREFIX "X86CompilationCallback2\n"
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// Restore all XMM arg registers
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"movaps 112(%rsp), %xmm7\n"
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"movaps 96(%rsp), %xmm6\n"
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"movaps 80(%rsp), %xmm5\n"
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"movaps 64(%rsp), %xmm4\n"
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"movaps 48(%rsp), %xmm3\n"
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"movaps 32(%rsp), %xmm2\n"
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"movaps 16(%rsp), %xmm1\n"
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"movaps (%rsp), %xmm0\n"
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// Restore RSP
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"movq %rbp, %rsp\n"
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// Restore all int arg registers
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"subq $48, %rsp\n"
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"popq %r9\n"
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"popq %r8\n"
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"popq %rcx\n"
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"popq %rdx\n"
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"popq %rsi\n"
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"popq %rdi\n"
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// Restore RBP
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"popq %rbp\n"
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"ret\n");
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#elif defined(__i386__) || defined(i386) || defined(_M_IX86)
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#ifndef _MSC_VER
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void X86CompilationCallback(void);
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asm(
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".text\n"
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".align 8\n"
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".globl " ASMPREFIX "X86CompilationCallback\n"
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ASMPREFIX "X86CompilationCallback:\n"
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"pushl %ebp\n"
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"movl %esp, %ebp\n" // Standard prologue
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#if FASTCC_NUM_INT_ARGS_INREGS > 0
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"pushl %eax\n"
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"pushl %edx\n" // Save EAX/EDX
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#endif
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#if defined(__APPLE__)
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"andl $-16, %esp\n" // Align ESP on 16-byte boundary
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#endif
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"subl $16, %esp\n"
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"movl 4(%ebp), %eax\n" // Pass prev frame and return address
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"movl %eax, 4(%esp)\n"
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"movl %ebp, (%esp)\n"
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"call " ASMPREFIX "X86CompilationCallback2\n"
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"movl %ebp, %esp\n" // Restore ESP
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#if FASTCC_NUM_INT_ARGS_INREGS > 0
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"subl $8, %esp\n"
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"popl %edx\n"
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"popl %eax\n"
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#endif
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"popl %ebp\n"
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"ret\n");
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// Same as X86CompilationCallback but also saves XMM argument registers.
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void X86CompilationCallback_SSE(void);
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asm(
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".text\n"
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".align 8\n"
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".globl " ASMPREFIX "X86CompilationCallback_SSE\n"
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ASMPREFIX "X86CompilationCallback_SSE:\n"
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"pushl %ebp\n"
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"movl %esp, %ebp\n" // Standard prologue
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#if FASTCC_NUM_INT_ARGS_INREGS > 0
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"pushl %eax\n"
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"pushl %edx\n" // Save EAX/EDX
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#endif
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"andl $-16, %esp\n" // Align ESP on 16-byte boundary
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// Save all XMM arg registers
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"subl $64, %esp\n"
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"movaps %xmm0, (%esp)\n"
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"movaps %xmm1, 16(%esp)\n"
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"movaps %xmm2, 32(%esp)\n"
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"movaps %xmm3, 48(%esp)\n"
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"subl $16, %esp\n"
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"movl 4(%ebp), %eax\n" // Pass prev frame and return address
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"movl %eax, 4(%esp)\n"
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"movl %ebp, (%esp)\n"
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"call " ASMPREFIX "X86CompilationCallback2\n"
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"addl $16, %esp\n"
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"movaps 48(%esp), %xmm3\n"
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"movaps 32(%esp), %xmm2\n"
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"movaps 16(%esp), %xmm1\n"
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"movaps (%esp), %xmm0\n"
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"movl %ebp, %esp\n" // Restore ESP
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#if FASTCC_NUM_INT_ARGS_INREGS > 0
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"subl $8, %esp\n"
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"popl %edx\n"
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"popl %eax\n"
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#endif
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"popl %ebp\n"
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"ret\n");
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#else
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void X86CompilationCallback2(void);
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_declspec(naked) void X86CompilationCallback(void) {
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__asm {
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push eax
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push edx
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call X86CompilationCallback2
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pop edx
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pop eax
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ret
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}
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}
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#endif // _MSC_VER
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#else // Not an i386 host
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void X86CompilationCallback() {
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assert(0 && "Cannot call X86CompilationCallback() on a non-x86 arch!\n");
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abort();
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}
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#endif
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}
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/// X86CompilationCallback - This is the target-specific function invoked by the
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/// function stub when we did not know the real target of a call. This function
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/// must locate the start of the stub or call site and pass it into the JIT
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/// compiler function.
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#ifdef _MSC_VER
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extern "C" void X86CompilationCallback2() {
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assert(sizeof(size_t) == 4); // FIXME: handle Win64
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unsigned *RetAddrLoc = (unsigned *)_AddressOfReturnAddress();
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RetAddrLoc += 3; // skip over ret addr, edx, eax
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unsigned RetAddr = *RetAddrLoc;
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#else
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extern "C" void X86CompilationCallback2(intptr_t *StackPtr, intptr_t RetAddr) {
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intptr_t *RetAddrLoc = &StackPtr[1];
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#endif
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assert(*RetAddrLoc == RetAddr &&
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"Could not find return address on the stack!");
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// It's a stub if there is an interrupt marker after the call.
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bool isStub = ((unsigned char*)RetAddr)[0] == 0xCD;
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// The call instruction should have pushed the return value onto the stack...
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RetAddr -= 4; // Backtrack to the reference itself...
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#if 0
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DOUT << "In callback! Addr=" << (void*)RetAddr
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<< " ESP=" << (void*)StackPtr
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<< ": Resolving call to function: "
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<< TheVM->getFunctionReferencedName((void*)RetAddr) << "\n";
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#endif
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// Sanity check to make sure this really is a call instruction.
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assert(((unsigned char*)RetAddr)[-1] == 0xE8 &&"Not a call instr!");
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intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)RetAddr);
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// Rewrite the call target... so that we don't end up here every time we
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// execute the call.
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*(unsigned *)RetAddr = (unsigned)(NewVal-RetAddr-4);
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if (isStub) {
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// If this is a stub, rewrite the call into an unconditional branch
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// instruction so that two return addresses are not pushed onto the stack
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// when the requested function finally gets called. This also makes the
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// 0xCD byte (interrupt) dead, so the marker doesn't effect anything.
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((unsigned char*)RetAddr)[-1] = 0xE9;
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}
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// Change the return address to reexecute the call instruction...
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*RetAddrLoc -= 5;
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}
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TargetJITInfo::LazyResolverFn
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X86JITInfo::getLazyResolverFunction(JITCompilerFn F) {
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JITCompilerFunction = F;
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#if (defined(__i386__) || defined(i386) || defined(_M_IX86)) && \
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!defined(_MSC_VER) && !defined(__x86_64__)
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unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
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union {
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unsigned u[3];
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char c[12];
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} text;
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if (!X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1)) {
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// FIXME: support for AMD family of processors.
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if (memcmp(text.c, "GenuineIntel", 12) == 0) {
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X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
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if ((EDX >> 25) & 0x1)
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return X86CompilationCallback_SSE;
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}
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}
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#endif
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return X86CompilationCallback;
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}
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void *X86JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
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// Note, we cast to intptr_t here to silence a -pedantic warning that
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// complains about casting a function pointer to a normal pointer.
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#if (defined(__i386__) || defined(i386) || defined(_M_IX86)) && \
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!defined(_MSC_VER) && !defined(__x86_64__)
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bool NotCC = (Fn != (void*)(intptr_t)X86CompilationCallback &&
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Fn != (void*)(intptr_t)X86CompilationCallback_SSE);
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#else
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bool NotCC = Fn != (void*)(intptr_t)X86CompilationCallback;
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#endif
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if (NotCC) {
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MCE.startFunctionStub(5, 4);
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MCE.emitByte(0xE9);
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MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
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return MCE.finishFunctionStub(0);
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}
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MCE.startFunctionStub(6, 4);
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MCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
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MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
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MCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
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return MCE.finishFunctionStub(0);
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}
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/// relocate - Before the JIT can run a block of code that has been emitted,
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/// it must rewrite the code to contain the actual addresses of any
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/// referenced global symbols.
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void X86JITInfo::relocate(void *Function, MachineRelocation *MR,
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unsigned NumRelocs, unsigned char* GOTBase) {
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for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
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void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
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intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
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switch ((X86::RelocationType)MR->getRelocationType()) {
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case X86::reloc_pcrel_word: {
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// PC relative relocation, add the relocated value to the value already in
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// memory, after we adjust it for where the PC is.
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ResultPtr = ResultPtr-(intptr_t)RelocPos-4-MR->getConstantVal();
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*((unsigned*)RelocPos) += (unsigned)ResultPtr;
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break;
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}
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case X86::reloc_absolute_word:
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// Absolute relocation, just add the relocated value to the value already
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// in memory.
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*((unsigned*)RelocPos) += (unsigned)ResultPtr;
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break;
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case X86::reloc_absolute_dword:
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*((intptr_t*)RelocPos) += ResultPtr;
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break;
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}
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}
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}
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