llvm/lib/Target/Alpha
Chris Lattner 03a46989b6 silence warning when asserts disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61013 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-14 21:37:33 +00:00
..
AsmPrinter Separate alpha asmprinter. This should unbreak native build. 2008-11-11 16:42:17 +00:00
Alpha.h
Alpha.td Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 2008-11-24 07:34:46 +00:00
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. 2008-12-03 18:15:48 +00:00
AlphaInstrInfo.cpp Split foldMemoryOperand into public non-virtual and protected virtual 2008-12-03 18:43:12 +00:00
AlphaInstrInfo.h Split foldMemoryOperand into public non-virtual and protected virtual 2008-12-03 18:43:12 +00:00
AlphaInstrInfo.td silence warning when asserts disabled. 2008-12-14 21:37:33 +00:00
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp There are no longer any places that require a 2008-12-01 11:41:29 +00:00
AlphaISelLowering.h Change the interface to the type legalization method 2008-12-01 11:39:25 +00:00
AlphaJITInfo.cpp Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr. 2008-11-08 08:02:53 +00:00
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp Adds extern "C" ints to the .cpp files that use RegisterTarget, as 2008-11-15 21:36:30 +00:00
AlphaTargetMachine.h
CMakeLists.txt CMake: corrected split of Alpha and Sparc AsmPrinters. 2008-11-11 17:10:13 +00:00
Makefile Separate alpha asmprinter. This should unbreak native build. 2008-11-11 16:42:17 +00:00
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html