Tom Stellard 188cca3dd5 InstCombine: Avoid introducing poison values when lowering llvm.amdgcn.[us]bfe ...

Summary:
When the 3rd argument to these intrinsics is zero, lowering them
to shift instructions produces poison values, since we end up with
shift amounts equal to the number of bits in the shifted value.  This
means we can only lower these intrinsics if we can prove that the
3rd argument is not zero.

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: bnieuwenhuizen, jvesely, wdng, nhaehnle, llvm-commits

Differential Revision: https://reviews.llvm.org/D53739

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346422 91177308-0d34-0410-b5e6-96231b3b80d8

2018-11-08 17:57:57 +00:00

..

CMakeLists.txt

InstCombine/AMDGPU: Add dimension-aware image intrinsics to SimplifyDemanded

2018-06-21 13:37:31 +00:00

InstCombineAddSub.cpp

[InstCombine] name change: foldShuffledBinop -> foldVectorBinop; NFC

2018-10-03 15:20:58 +00:00

InstCombineAndOrXor.cpp

[InstCombine] try harder to form select from logic ops (2nd try)

2018-10-24 15:17:56 +00:00

InstCombineCalls.cpp

InstCombine: Avoid introducing poison values when lowering llvm.amdgcn.[us]bfe

2018-11-08 17:57:57 +00:00

InstCombineCasts.cpp

[FPEnv] Last BinaryOperator::isFNeg(...) to m_FNeg(...) changes

2018-10-25 18:09:33 +00:00

InstCombineCompares.cpp

[InstCombine] propagate FMF for fcmp+fabs folds

2018-11-07 16:15:01 +00:00

InstCombineInternal.h

[InstCombine] try harder to form select from logic ops (2nd try)

2018-10-24 15:17:56 +00:00

InstCombineLoadStoreAlloca.cpp

[Local] Make DoesKMove required for combineMetadata.

2018-08-24 11:40:04 +00:00

InstCombineMulDivRem.cpp

Add a emitUnaryFloatFnCall version that fetches the function name from TLI

2018-10-18 06:27:53 +00:00

InstCombinePHI.cpp

Use llvm::{all,any,none}_of instead std::{all,any,none}_of. NFC

2018-10-19 06:12:02 +00:00

InstCombineSelect.cpp

[InstSimplify] fold select (fcmp X, Y), X, Y

2018-11-05 21:51:39 +00:00

InstCombineShifts.cpp

[InstCombine] Ensure nested shifts are in range (OSS-Fuzz #9880)

2018-11-06 11:28:22 +00:00

InstCombineSimplifyDemanded.cpp

[InstCombine] Demand bits of UMin

2018-10-11 11:28:27 +00:00

InstCombineTables.td

InstCombine/AMDGPU: Add dimension-aware image intrinsics to SimplifyDemanded

2018-06-21 13:37:31 +00:00

InstCombineVectorOps.cpp

[InstCombine] try to turn shuffle into insertelement

2018-10-30 15:26:39 +00:00

InstructionCombining.cpp

fix typos aggressively; NFC

2018-11-07 14:35:36 +00:00

LLVMBuild.txt

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