Matt Arsenault 117c014fc5 AMDGPU/SI: Fix creating v_mov_b32s without exec uses ...

This will be caught by existing tests with a
verifier check to be added in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247229 91177308-0d34-0410-b5e6-96231b3b80d8

2015-09-10 01:06:06 +00:00

..

AsmParser

AMDGPU/SI: Fix input vcc operand for VOP2b instructions

2015-09-08 21:15:00 +00:00

InstPrinter

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MCTargetDesc

Add missing include guard.

2015-08-16 07:55:08 +00:00

TargetInfo

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Utils

AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support

2015-06-26 21:58:31 +00:00

AMDGPU.h

AMDGPU: Add pass to lower OpenCL image and sampler arguments.

2015-08-07 23:19:30 +00:00

AMDGPU.td

AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets

2015-07-16 19:40:07 +00:00

AMDGPUAlwaysInlinePass.cpp

AMDGPU: Minor cleanups to always inline pass

2015-07-13 19:08:36 +00:00

AMDGPUAsmPrinter.cpp

AMDGPU/SI: Fix printing useless info with amdhsa

2015-08-15 00:12:39 +00:00

AMDGPUAsmPrinter.h

AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()

2015-06-26 21:14:58 +00:00

AMDGPUCallingConv.td

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AMDGPUFrameLowering.cpp

Remove redundant TargetFrameLowering::getFrameIndexOffset virtual

2015-08-15 02:32:35 +00:00

AMDGPUFrameLowering.h

Remove redundant TargetFrameLowering::getFrameIndexOffset virtual

2015-08-15 02:32:35 +00:00

AMDGPUInstrInfo.cpp

Remove redundant TargetFrameLowering::getFrameIndexOffset virtual

2015-08-15 02:32:35 +00:00

AMDGPUInstrInfo.h

MIR Serialization: Serialize the target index machine operands.

2015-07-28 23:02:45 +00:00

AMDGPUInstrInfo.td

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AMDGPUInstructions.td

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AMDGPUIntrinsicInfo.cpp

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AMDGPUIntrinsicInfo.h

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AMDGPUIntrinsics.td

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AMDGPUISelDAGToDAG.cpp

AMDGPU: Handle sub of constant for DS offset folding

2015-09-08 19:34:22 +00:00

AMDGPUISelLowering.cpp

AMDGPU: Produce error on dynamic_stackalloc

2015-08-26 18:37:13 +00:00

AMDGPUISelLowering.h

AMDGPU: Produce error on dynamic_stackalloc

2015-08-26 18:37:13 +00:00

AMDGPUMachineFunction.cpp

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AMDGPUMachineFunction.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

AMDGPUMCInstLower.cpp

Remove and forbid raw_svector_ostream::flush() calls.

2015-08-13 18:12:56 +00:00

AMDGPUMCInstLower.h

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AMDGPUOpenCLImageTypeLoweringPass.cpp

AMDGPU/SI: Another attempt to fix Windows bots broken by r244372

2015-08-08 01:11:07 +00:00

AMDGPUPromoteAlloca.cpp

AMDGPU: Produce error on dynamic_stackalloc

2015-08-26 18:37:13 +00:00

AMDGPURegisterInfo.cpp

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AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

AMDGPU: Set SubRegIndex size and offset

2015-07-30 17:03:11 +00:00

AMDGPUSubtarget.cpp

AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets

2015-07-16 19:40:07 +00:00

AMDGPUSubtarget.h

AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets

2015-07-16 19:40:07 +00:00

AMDGPUTargetMachine.cpp

AMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges

2015-08-22 00:19:34 +00:00

AMDGPUTargetMachine.h

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AMDGPUTargetTransformInfo.cpp

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AMDGPUTargetTransformInfo.h

Make TargetTransformInfo keeping a reference to the Module DataLayout

2015-07-09 02:08:42 +00:00

AMDILCFGStructurizer.cpp

AMDGPU/R600: Remove unused variable

2015-07-16 16:13:34 +00:00

AMDKernelCodeT.h

AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support

2015-06-26 21:58:31 +00:00

CaymanInstructions.td

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CIInstructions.td

AMDGPU: Improve accuracy of instruction rates for some FP instructions

2015-08-22 00:50:41 +00:00

CMakeLists.txt

AMDGPU: Add pass to lower OpenCL image and sampler arguments.

2015-08-07 23:19:30 +00:00

EvergreenInstructions.td

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LLVMBuild.txt

AMDGPU/SI: Add hsa code object directives

2015-06-26 21:15:07 +00:00

Makefile

AMDGPU/SI: Add hsa code object directives

2015-06-26 21:15:07 +00:00

Processors.td

AMDGPU/SI: Add Fiji support

2015-08-06 19:43:02 +00:00

R600ClauseMergePass.cpp

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R600ControlFlowFinalizer.cpp

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R600Defines.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

R600EmitClauseMarkers.cpp

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R600ExpandSpecialInstrs.cpp

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R600InstrFormats.td

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R600InstrInfo.cpp

Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr

2015-06-25 13:28:24 +00:00

R600InstrInfo.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

R600Instructions.td

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R600Intrinsics.td

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R600ISelLowering.cpp

Add missing break in switch case in R600ISelLowering

2015-07-16 06:23:12 +00:00

R600ISelLowering.h

Make TargetLowering::getPointerTy() taking DataLayout as an argument

2015-07-09 02:09:04 +00:00

R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

R600MachineScheduler.cpp

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R600MachineScheduler.h

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R600OptimizeVectorRegisters.cpp

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

R600Packetizer.cpp

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R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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R600TextureIntrinsicsReplacer.cpp

Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)

2015-06-23 09:49:53 +00:00

R700Instructions.td

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SIAnnotateControlFlow.cpp

[PM/AA] Remove all of the dead AliasAnalysis pointers being threaded

2015-07-22 09:52:54 +00:00

SIDefines.h

AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support

2015-06-26 21:58:31 +00:00

SIFixControlFlowLiveIntervals.cpp

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SIFixSGPRCopies.cpp

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SIFixSGPRLiveRanges.cpp

AMDGPU/SI: Report SIFixSGPRLiveRanges changed function

2015-08-26 19:12:03 +00:00

SIFoldOperands.cpp

AMDGPU/SI: Fix creating v_mov_b32s without exec uses

2015-09-10 01:06:06 +00:00

SIInsertWaits.cpp

AMDGPU/SI: Better handle s_wait insertion

2015-08-21 22:47:27 +00:00

SIInstrFormats.td

AMDGPU/SI: Remove VCCReg

2015-08-08 00:41:48 +00:00

SIInstrInfo.cpp

AMDGPU: Extract full 64-bit subregister and use subregs

2015-09-09 17:03:29 +00:00

SIInstrInfo.h

AMDGPU: Delete dead code

2015-08-26 20:48:08 +00:00

SIInstrInfo.td

AMDGPU: Remove unused multiclass argument

2015-09-09 17:03:18 +00:00

SIInstructions.td

AMDGPU/SI: Fix input vcc operand for VOP2b instructions

2015-09-08 21:15:00 +00:00

SIIntrinsics.td

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SIISelLowering.cpp

SelectionDAG: Support Expand of f16 extloads

2015-09-09 01:12:27 +00:00

SIISelLowering.h

AMDGPU: Assume SMRD access for constant address space

2015-08-07 20:18:34 +00:00

SILoadStoreOptimizer.cpp

AMDGPU/SI: Fix read2 merging into a super register.

2015-07-14 17:57:36 +00:00

SILowerControlFlow.cpp

AMDGPU/SI: Remove VCCReg

2015-08-08 00:41:48 +00:00

SILowerI1Copies.cpp

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SIMachineFunctionInfo.cpp

MachineRegisterInfo: Remove UsedPhysReg infrastructure

2015-07-14 17:52:07 +00:00

SIMachineFunctionInfo.h

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SIPrepareScratchRegs.cpp

MachineRegisterInfo: Remove UsedPhysReg infrastructure

2015-07-14 17:52:07 +00:00

SIRegisterInfo.cpp

AMDGPU: Set mem operands for spill instructions

2015-08-29 06:48:57 +00:00

SIRegisterInfo.h

AMDGPU: Make sure to reserve super registers

2015-08-26 18:54:50 +00:00

SIRegisterInfo.td

AMDGPU/SI: Fix input vcc operand for VOP2b instructions

2015-09-08 21:15:00 +00:00

SISchedule.td

AMDGPU: Mark s_barrier as a high latency instruction

2015-09-08 19:54:32 +00:00

SIShrinkInstructions.cpp

AMDGPU/SI: Remove VCCReg

2015-08-08 00:41:48 +00:00

SITypeRewriter.cpp

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VIInstrFormats.td

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VIInstructions.td

AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops

2015-07-20 14:28:41 +00:00