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6b7d99d473
This patch replaces the control flow handling with a new pass which structurize the graph before transforming it to machine instruction. This has a couple of different advantages and currently fixes 20 piglit tests without a single regression. It is now a general purpose transformation that could be not only be used for SI/R6xx, but also for other hardware implementations that use a form of structurized control flow. v2: further cleanup, fixes and documentation Patch by: Christian König Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
1.3 KiB
C++
50 lines
1.3 KiB
C++
//===-- AMDGPU.h - MachineFunction passes hw codegen --------------*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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/// \file
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//===----------------------------------------------------------------------===//
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#ifndef AMDGPU_H
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#define AMDGPU_H
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#include "AMDGPUTargetMachine.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class FunctionPass;
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class AMDGPUTargetMachine;
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// R600 Passes
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FunctionPass* createR600KernelParametersPass(const DataLayout *TD);
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FunctionPass *createR600ExpandSpecialInstrsPass(TargetMachine &tm);
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// SI Passes
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FunctionPass *createSIAnnotateControlFlowPass();
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FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm);
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FunctionPass *createSILowerControlFlowPass(TargetMachine &tm);
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FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
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FunctionPass *createSILowerLiteralConstantsPass(TargetMachine &tm);
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// Passes common to R600 and SI
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Pass *createAMDGPUStructurizeCFGPass();
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FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm);
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} // End namespace llvm
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namespace ShaderType {
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enum Type {
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PIXEL = 0,
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VERTEX = 1,
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GEOMETRY = 2,
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COMPUTE = 3
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};
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}
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#endif // AMDGPU_H
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