Richard Osborne 13c4fabf99 Add XCore support for arbitrary-sized aggregate returns. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88802 91177308-0d34-0410-b5e6-96231b3b80d8		2009-11-14 19:33:35 +00:00
..
Alpha
ARM	- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.	2009-11-14 02:55:43 +00:00
Blackfin	Move Blackfin intrinsics into the Target/Blackfin directory.	2009-10-15 18:50:52 +00:00
CBackend
CellSPU	Revert the main portion of r31856. It was causing BranchFolding	2009-10-22 00:03:58 +00:00
CPP	fix PR5295 where the .ll parser didn't reject a function after a global	2009-10-25 23:22:50 +00:00
Generic	Fix PR5421 by APInt'izing switch lowering.	2009-11-07 07:50:34 +00:00
Mips
MSP430	Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!	2009-11-08 15:33:12 +00:00
PIC16	Re-apply 84180 with the fixed test case.	2009-10-15 19:26:25 +00:00
PowerPC	Adjust isConstantSplat to allow for big-endian targets.	2009-11-13 01:45:18 +00:00
SPARC	Eliminate some redundant llvm-as calls.	2009-10-12 09:31:55 +00:00
SystemZ
Thumb	Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.	2009-11-07 04:04:34 +00:00
Thumb2	When expanding t2STRDi8 r, r to two stores, add kill markers correctly.	2009-11-14 01:50:00 +00:00
X86	Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to replace broken code in VirtRegRewriter.	2009-11-14 03:42:17 +00:00
XCore	Add XCore support for arbitrary-sized aggregate returns.	2009-11-14 19:33:35 +00:00