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https://github.com/RPCS3/llvm.git
synced 2026-07-25 04:35:32 -04:00
Ahmed Bougacha
16a661561f
ARM counterpart to r248291: In the comparison failure block of a cmpxchg expansion, the initial ldrex/ldxr will not be followed by a matching strex/stxr. On ARM/AArch64, this unnecessarily ties up the execution monitor, which might have a negative performance impact on some uarchs. Instead, release the monitor in the failure block. The clrex instruction was designed for this: use it. Also see ARMARM v8-A B2.10.2: "Exclusive access instructions and Shareable memory locations". Differential Revision: http://reviews.llvm.org/D13033 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248294 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.6 KiB
LLVM
69 lines
2.6 KiB
LLVM
; RUN: llc < %s -mtriple=arm-linux-gnueabi -asm-verbose=false -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-ARM
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; RUN: llc < %s -mtriple=thumb-linux-gnueabi -asm-verbose=false -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-THUMB
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -asm-verbose=false -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-ARMV7
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; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -asm-verbose=false -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-THUMBV7
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define zeroext i1 @test_cmpxchg_res_i8(i8* %addr, i8 %desired, i8 zeroext %new) {
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entry:
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%0 = cmpxchg i8* %addr, i8 %desired, i8 %new monotonic monotonic
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%1 = extractvalue { i8, i1 } %0, 1
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ret i1 %1
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}
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; CHECK-ARM-LABEL: test_cmpxchg_res_i8
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; CHECK-ARM: bl __sync_val_compare_and_swap_1
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; CHECK-ARM: mov [[REG:r[0-9]+]], #0
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; CHECK-ARM: cmp r0, {{r[0-9]+}}
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; CHECK-ARM: moveq [[REG]], #1
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; CHECK-ARM: mov r0, [[REG]]
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; CHECK-THUMB-LABEL: test_cmpxchg_res_i8
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; CHECK-THUMB: bl __sync_val_compare_and_swap_1
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; CHECK-THUMB-NOT: mov [[R1:r[0-7]]], r0
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; CHECK-THUMB: push {r0}
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; CHECK-THUMB: pop {[[R1:r[0-7]]]}
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; CHECK-THUMB: movs r0, #1
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; CHECK-THUMB: movs [[R2:r[0-9]+]], #0
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; CHECK-THUMB: cmp [[R1]], {{r[0-9]+}}
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; CHECK-THU<B: beq
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; CHECK-THUMB: push {[[R2]]}
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; CHECK-THUMB: pop {r0}
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; CHECK-ARMV7-LABEL: test_cmpxchg_res_i8:
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; CHECK-ARMV7-NEXT: .fnstart
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; CHECK-ARMV7-NEXT: uxtb [[DESIRED:r[0-9]+]], r1
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; CHECK-ARMV7-NEXT: [[TRY:.LBB[0-9_]+]]:
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; CHECK-ARMV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
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; CHECK-ARMV7-NEXT: cmp [[LD]], [[DESIRED]]
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; CHECK-ARMV7-NEXT: bne [[FAIL:.LBB[0-9_]+]]
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; CHECK-ARMV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
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; CHECK-ARMV7-NEXT: mov [[RES:r[0-9]+]], #1
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; CHECK-ARMV7-NEXT: cmp [[SUCCESS]], #0
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; CHECK-ARMV7-NEXT: bne [[TRY]]
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; CHECK-ARMV7-NEXT: b [[END:.LBB[0-9_]+]]
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; CHECK-ARMV7-NEXT: [[FAIL]]:
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; CHECK-ARMV7-NEXT: clrex
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; CHECK-ARMV7-NEXT: mov [[RES]], #0
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; CHECK-ARMV7-NEXT: [[END]]:
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; CHECK-ARMV7-NEXT: mov r0, [[RES]]
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; CHECK-ARMV7-NEXT: bx lr
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; CHECK-THUMBV7-LABEL: test_cmpxchg_res_i8:
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; CHECK-THUMBV7-NEXT: .fnstart
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; CHECK-THUMBV7-NEXT: uxtb [[DESIRED:r[0-9]+]], r1
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; CHECK-THUMBV7-NEXT: b [[TRYLD:.LBB[0-9_]+]]
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; CHECK-THUMBV7-NEXT: [[TRYST:.LBB[0-9_]+]]:
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; CHECK-THUMBV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
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; CHECK-THUMBV7-NEXT: cmp [[SUCCESS]], #0
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; CHECK-THUMBV7-NEXT: itt eq
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; CHECK-THUMBV7-NEXT: moveq r0, #1
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; CHECK-THUMBV7-NEXT: bxeq lr
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; CHECK-THUMBV7-NEXT: [[TRYLD]]:
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; CHECK-THUMBV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
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; CHECK-THUMBV7-NEXT: cmp [[LD]], [[DESIRED]]
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; CHECK-THUMBV7-NEXT: beq [[TRYST:.LBB[0-9_]+]]
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; CHECK-THUMBV7-NEXT: clrex
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; CHECK-THUMBV7-NEXT: movs r0, #0
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; CHECK-THUMBV7-NEXT: bx lr
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