Files
llvm/test
Simon Atanasyan 1699e3d2a0 [mips] Fix loading "double" immediate into a GPR and FPR
If a "double" (64-bit) value has zero low 32-bits, it's possible to load
such value into a GP/FP registers as an instruction immediate. But now
assembler loads only high 32-bits of the value.

For example, if a target register is GPR the `li.d $4, 1.0` instruction
converts into the `lui $4, 16368` one. As a result, we get `0x3FF00000`
in the register. While a correct representation of the `1.0` value is
`0x3FF0000000000000`. The patch fixes that.

Differential Revision: https://reviews.llvm.org/D68776

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374544 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-11 12:33:12 +00:00
..
2019-10-11 11:59:55 +00:00