llvm/test at 16cb7fc21c4883c02f239fc41a544e6171d3e036 - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2025-03-05 17:18:55 +00:00

History

Matthias Braun 573a81b6bf ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code

Re-apply of r241928 which had to be reverted because of the r241926
revert.

This commit factors out common code from MergeBaseUpdateLoadStore() and
MergeBaseUpdateLSMultiple() and introduces a new function
MergeBaseUpdateLSDouble() which merges adds/subs preceding/following a
strd/ldrd instruction into an strd/ldrd instruction with writeback where
possible.

Differential Revision: http://reviews.llvm.org/D10676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242743 91177308-0d34-0410-b5e6-96231b3b80d8

2015-07-21 00:19:01 +00:00

Analysis

[X86][SSE] Updated SHL/LSHR i64 vectorization costs.

2015-07-18 20:06:30 +00:00

Assembler

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Bindings

[OCaml] Do not use -warn-error in tests.

2015-07-17 17:33:23 +00:00

Bitcode

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BugPoint