Jim Grosbach 1835547ec1 ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction. ...

While there is an encoding for it in VUZP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11222366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154511 91177308-0d34-0410-b5e6-96231b3b80d8

2012-04-11 17:40:18 +00:00

..

ARM

ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.

2012-04-11 17:40:18 +00:00

AsmParser

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

COFF

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Disassembler

Add retw and lretw instructions. Also, fix Intel syntax parsing for all

2012-04-11 01:10:53 +00:00

ELF

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

MachO

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

MBlaze

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Mips

Initial 64 bit direct object support.

2012-04-02 19:25:22 +00:00

X86

Add retw and lretw instructions. Also, fix Intel syntax parsing for all

2012-04-11 01:10:53 +00:00