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SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16 $T8 shows up as register $24 when emitted from C++ code so we had to change some tests that were already there for this functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175593 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
566 B
LLVM
21 lines
566 B
LLVM
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@j = global i32 5, align 4
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@k = global i32 10, align 4
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@l = global i32 20, align 4
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@m = global i32 10, align 4
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@r1 = common global i32 0, align 4
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@r2 = common global i32 0, align 4
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@r3 = common global i32 0, align 4
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define void @test() nounwind {
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entry:
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%0 = load i32* @j, align 4
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%cmp = icmp ult i32 %0, 10
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* @r1, align 4
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; 16: sltiu ${{[0-9]+}}, 10 # 16 bit inst
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; 16: move ${{[0-9]+}}, $24
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ret void
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}
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