Tim Northover 32048586b0 AArch64: only try to use scaled fcvt ops on legal vector types. ...

Before we ended up calling getSimpleVectorType on a <3 x float>, which
asserted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263169 91177308-0d34-0410-b5e6-96231b3b80d8

2016-03-10 23:02:21 +00:00

..

AArch64

AArch64: only try to use scaled fcvt ops on legal vector types.

2016-03-10 23:02:21 +00:00

AMDGPU

AMDGPU/SI: add llvm.amdgcn.buffer.load/store.format intrinsics

2016-03-10 18:43:50 +00:00

ARM

[ARM] Cortex-R8 support

2016-03-10 17:38:41 +00:00

BPF

Revert "Change memcpy/memset/memmove to have dest and source alignments."

2015-11-19 05:56:52 +00:00

CPP

Fix CPP Backend for GEP API changes for opaque pointer types

2015-09-08 18:42:29 +00:00

Generic

Move test/CodeGen/Generic/pr26652.ll to test/CodeGen/X86/pr26652.ll and test it only on X86.

2016-02-25 00:12:18 +00:00

Hexagon

Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.

2016-02-26 19:40:34 +00:00

Inputs

DI: Reverse direction of subprogram -> function edge.

2015-11-05 22:03:56 +00:00

Mips

[mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated.

2016-03-04 17:34:31 +00:00

MIR

[MIR] Teach the parser/printer that generic virtual registers do not need a register class.

2016-03-08 01:17:03 +00:00

MSP430

MSP430InstrInfo::loadRegFromStackSlot forgets to set register def.

2016-02-24 15:15:02 +00:00

NVPTX

[NVPTX] Use different, convergent MIs for convergent calls.

2016-03-01 19:24:03 +00:00

PowerPC

[PPC] backend changes to generate xvabs[s,d]p and xvnabs[s,d]p instructions

2016-03-09 17:48:01 +00:00

SPARC

Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.

2016-02-26 19:40:34 +00:00

SystemZ

[SystemZ] Fix ABI for i128 argument and return types

2016-02-19 14:10:21 +00:00

Thumb

Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.

2016-02-26 19:40:34 +00:00

Thumb2

ARM: Introduce conservative load/store optimization mode

2016-03-02 19:20:00 +00:00

WebAssembly

[WebAssembly] Implement irreducible control flow.

2016-03-09 02:01:14 +00:00

WinEH

[WinEH] Make setjmp work correctly with EH

2016-02-29 19:16:03 +00:00

X86

[X86][SSE] Reapplied: Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREG

2016-03-10 20:40:26 +00:00

XCore

[MC] Use .p2align instead of .align

2016-01-26 00:03:25 +00:00