Tim Northover 196c8e5fbb ARM: correctly determine final tBX_LR in Thumb1 functions ...

The changes caused by folding an sp-adjustment into a "pop" previously
disrupted the forward search for the final real instruction in a
terminating block. This switches to a backward search (skipping debug
instrs).

This fixes PR18399.

Patch by Zhaoshi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199266 91177308-0d34-0410-b5e6-96231b3b80d8

2014-01-14 22:53:28 +00:00

..

AArch64

AArch64: don't try to handle [SU]MUL_LOHI nodes

2014-01-14 22:53:22 +00:00

ARM

ARM: correctly determine final tBX_LR in Thumb1 functions

2014-01-14 22:53:28 +00:00

CPP

Begin adding docs and IR-level support for the inalloca attribute

2013-12-19 02:14:12 +00:00

Generic

Remove a failing test to get the buildbots back to green.

2014-01-06 00:43:09 +00:00

Hexagon

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Inputs

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Mips

Fix a low hanging use of hasRawTextSupport.

2014-01-14 18:57:12 +00:00

MSP430

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NVPTX

Fix non-deterministic SDNodeOrder-dependent codegen

2014-01-12 14:09:17 +00:00

PowerPC

Implement initial-exec TLS for PPC32.

2013-12-20 18:08:54 +00:00

R600

Fix broken CHECK lines.

2014-01-11 21:06:00 +00:00

SPARC

Always let value types influence register classes.

2014-01-14 06:18:38 +00:00

SystemZ

[SystemZ] Flesh out stackrestore test (frame-11.ll)

2014-01-13 15:44:44 +00:00

Thumb

Fix broken CHECK lines.

2014-01-11 21:06:00 +00:00

Thumb2

Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks

2014-01-13 18:47:54 +00:00

X86

Handle dllexport for global aliases

2014-01-14 15:23:25 +00:00

XCore

Fix broken CHECK lines.

2014-01-11 21:06:00 +00:00