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1a035dd6df
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193816 91177308-0d34-0410-b5e6-96231b3b80d8
98 lines
3.2 KiB
LLVM
98 lines
3.2 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
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define float @test_vcvts_f32_s32(i32 %a) {
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; CHECK: test_vcvts_f32_s32
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; CHECK: scvtf {{s[0-9]+}}, {{s[0-9]+}}
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entry:
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%vcvtf.i = insertelement <1 x i32> undef, i32 %a, i32 0
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%vcvtf1.i = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.s32(<1 x i32> %vcvtf.i)
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%0 = extractelement <1 x float> %vcvtf1.i, i32 0
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ret float %0
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}
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declare <1 x float> @llvm.aarch64.neon.vcvtf32.s32(<1 x i32>)
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define double @test_vcvtd_f64_s64(i64 %a) {
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; CHECK: test_vcvtd_f64_s64
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; CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}
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entry:
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%vcvtf.i = insertelement <1 x i64> undef, i64 %a, i32 0
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%vcvtf1.i = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.s64(<1 x i64> %vcvtf.i)
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%0 = extractelement <1 x double> %vcvtf1.i, i32 0
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ret double %0
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}
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declare <1 x double> @llvm.aarch64.neon.vcvtf64.s64(<1 x i64>)
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define float @test_vcvts_f32_u32(i32 %a) {
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; CHECK: test_vcvts_f32_u32
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; CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}
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entry:
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%vcvtf.i = insertelement <1 x i32> undef, i32 %a, i32 0
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%vcvtf1.i = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.u32(<1 x i32> %vcvtf.i)
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%0 = extractelement <1 x float> %vcvtf1.i, i32 0
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ret float %0
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}
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declare <1 x float> @llvm.aarch64.neon.vcvtf32.u32(<1 x i32>)
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define double @test_vcvtd_f64_u64(i64 %a) {
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; CHECK: test_vcvtd_f64_u64
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; CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}
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entry:
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%vcvtf.i = insertelement <1 x i64> undef, i64 %a, i32 0
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%vcvtf1.i = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.u64(<1 x i64> %vcvtf.i)
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%0 = extractelement <1 x double> %vcvtf1.i, i32 0
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ret double %0
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}
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declare <1 x double> @llvm.aarch64.neon.vcvtf64.u64(<1 x i64>)
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define float @test_vcvts_n_f32_s32(i32 %a) {
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; CHECK: test_vcvts_n_f32_s32
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; CHECK: scvtf {{s[0-9]+}}, {{s[0-9]+}}, #1
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entry:
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%vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0
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%vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32> %vcvtf, i32 1)
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%0 = extractelement <1 x float> %vcvtf1, i32 0
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ret float %0
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}
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declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32>, i32)
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define double @test_vcvtd_n_f64_s64(i64 %a) {
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; CHECK: test_vcvtd_n_f64_s64
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; CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}, #1
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entry:
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%vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0
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%vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64> %vcvtf, i32 1)
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%0 = extractelement <1 x double> %vcvtf1, i32 0
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ret double %0
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}
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declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64>, i32)
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define float @test_vcvts_n_f32_u32(i32 %a) {
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; CHECK: test_vcvts_n_f32_u32
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; CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}, #1
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entry:
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%vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0
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%vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32> %vcvtf, i32 1)
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%0 = extractelement <1 x float> %vcvtf1, i32 0
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ret float %0
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}
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declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32>, i32)
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define double @test_vcvtd_n_f64_u64(i64 %a) {
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; CHECK: test_vcvtd_n_f64_u64
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; CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}, #1
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entry:
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%vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0
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%vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64> %vcvtf, i32 1)
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%0 = extractelement <1 x double> %vcvtf1, i32 0
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ret double %0
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}
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declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64>, i32)
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