Tom Stellard 1a0ffaa454 AMDGPU/GlobalISel: Implement select for G_INSERT ...

Reviewers: arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D53116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344310 91177308-0d34-0410-b5e6-96231b3b80d8

2018-10-11 22:49:54 +00:00

..

AArch64

[NFC][X86][AArch64] extract-bits.ll: add tests with constants+storing results.

2018-10-10 20:50:52 +00:00

AMDGPU

AMDGPU/GlobalISel: Implement select for G_INSERT

2018-10-11 22:49:54 +00:00

ARC

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ARM

[ARM] Account for implicit IT when calculating inline asm size

2018-10-08 09:38:28 +00:00

AVR

[AVR] Fix the 'call.ll' CodeGen test

2018-10-10 03:21:42 +00:00

BPF

[bpf] Test case for symbol information in object file

2018-09-22 17:31:01 +00:00

Generic

Revert r344197 "[MC][ELF] compute entity size for explicit sections"

2018-10-11 18:43:08 +00:00

Hexagon

[Hexagon] Restrict compound instructions with constant value.

2018-10-11 19:48:15 +00:00

Inputs

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Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[DAG] Fix Big Endian in Load-Store forwarding

2018-10-11 18:28:59 +00:00

MIR

[codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL

2018-10-01 21:59:45 +00:00

MSP430

[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks)

2018-08-29 11:18:14 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX] Implement isLegalToVectorizeLoadChain

2018-08-27 17:29:43 +00:00

PowerPC

[DAG] Fix Big Endian in Load-Store forwarding

2018-10-11 18:28:59 +00:00

RISCV

[RISCV] Re-generate test/CodeGen/RISCV/vararg.ll after r344142

2018-10-11 11:11:58 +00:00

SPARC

[Sparc] Remove the support for builtin setjmp/longjmp

2018-09-27 13:32:54 +00:00

SystemZ

[DAGCombine] Improve Load-Store Forwarding

2018-10-10 14:15:52 +00:00

Thumb

Revert "Revert "[ConstHoist] Do not rebase single (or few) dependent constant""

2018-09-26 00:59:09 +00:00

Thumb2

[ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33

2018-09-24 12:02:50 +00:00

WebAssembly

[WebAssembly] Saturating float to int intrinsics

2018-10-11 00:01:25 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[x86] add tests for extract_element; NFC

2018-10-11 22:04:36 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00