llvm/test/CodeGen
Quentin Colombet 1a10a51431 [RegAlloc] Add a last chance recoloring mechanism when everything else failed to
find a register.

The idea is to choose a color for the variable that cannot be allocated and
recolor its interferences around. Unlike the current register allocation scheme,
it is allowed to change the color of an already assigned (but maybe not
splittable or spillable) live interval while propagating this change to its
neighbors.
In other word, there are two things that may help finding an available color:
- Already assigned variables (RS_Done) can be recolored to different color.
- The recoloring allows to catch solutions that needs to touch more that just
  the neighbors of the current allocated variable.

E.g.,
vA can use {R1, R2    }
vB can use {    R2, R3}
vC can use {R1        }
Where vA, vB, and vC cannot be split anymore (they are reloads for instance) and
they all interfere.

vA is assigned R1
vB is assigned R2
vC tries to evict vA but vA is already done.
=> Regular register allocation heuristic fails.

Last chance recoloring kicks in:
vC does as if vA was evicted => vC uses R1.
vC is marked as fixed.
vA needs to find a color.
None are available.
vA cannot evict vC: vC is a fixed virtual register now.
vA does as if vB was evicted => vA uses R2.
vB needs to find a color.
R3 is available.
Recoloring => vC = R1, vA = R2, vB = R3.

<rdar://problem/15947839>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 22:13:59 +00:00
..
AArch64 ARM & AArch64: merge NEON absolute compare intrinsics 2014-02-04 14:55:42 +00:00
ARM Fix PR18345: ldr= pseudo instruction produces incorrect code when using in inline assembly 2014-02-04 17:22:40 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic Additional fix for 200201: due to dependence on bitwidth test was moved to X86 directory. 2014-01-27 09:43:10 +00:00
Hexagon DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0} 2014-02-04 01:23:52 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips [mips] Add NaCl target and forbid indexed loads and stores for it 2014-02-05 17:19:30 +00:00
MSP430 Fix known typos 2014-01-24 17:20:08 +00:00
NVPTX [NVPTX] Fix emitting aggregate parameters 2014-01-28 18:35:29 +00:00
PowerPC DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0} 2014-02-04 01:23:52 +00:00
R600 R600/SI: Add pattern for zero-extending i1 to i32 2014-02-05 09:48:05 +00:00
SPARC [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly. 2014-02-01 18:54:16 +00:00
SystemZ XFAIL test/CodeGen/SystemZ/alias-01.ll which requires CodeGen TBAA 2014-01-25 19:31:44 +00:00
Thumb CodeGen: Stop treating vectors as aggregates 2014-01-21 22:46:46 +00:00
Thumb2 PGO branch weight: update edge weights in IfConverter. 2014-01-29 23:18:47 +00:00
X86 [RegAlloc] Add a last chance recoloring mechanism when everything else failed to 2014-02-05 22:13:59 +00:00
XCore Fix broken CHECK lines. 2014-01-11 21:06:00 +00:00