llvm/inline-asm-zero-reg-error.ll at 1a44333f0e0938532c1a40b4b6d4f5e114bcf287 - llvm - Gitea: Git with a cup of tea

RPCS3/llvm

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Tim Northover 7b837d8c75 ARM64: initial backend import

This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8

2014-03-29 10:18:08 +00:00

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 ; RUN: not llc < %s -march=arm64 2>&1 | FileCheck %s
 ; The 'z' constraint allocates either xzr or wzr, but obviously an input of 1 is
 ; incompatible.
 define void @test_bad_zero_reg() {
   tail call void asm sideeffect "USE($0)", "z"(i32 1) nounwind
 ; CHECK: error: invalid operand for inline asm constraint 'z'
   ret void
 }