Simon Pilgrim 0c24604731 [X86][SSE] Add extra scalar fop + blend tests for commuted inputs ...

While working on PR38197, I noticed that we don't make use of FADD/FMUL being able to commute the inputs to support the addps+movss -> addss style combine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337375 91177308-0d34-0410-b5e6-96231b3b80d8

2018-07-18 10:54:13 +00:00

..

AArch64

[Intrinsics] define funnel shift IR intrinsics + DAG builder support

2018-07-16 22:59:31 +00:00

AMDGPU

More fixes for subreg join failure in RegCoalescer

2018-07-17 12:38:39 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT

2018-07-17 09:45:35 +00:00

AVR

[AVR] Set trackLivenessAfterRegAlloc

2018-06-11 14:46:48 +00:00

BPF

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

Generic

Implement strip.invariant.group

2018-07-02 04:49:30 +00:00

Hexagon

[Hexagon] Avoid introducing calls into coalesced range of HVX vector pairs

2018-07-13 23:42:29 +00:00

Inputs

…

Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[Mips][FastISel] Fix handling of icmp with i1 type

2018-07-17 14:57:46 +00:00

MIR

[DebugInfo][X86] Add start-after flags to MIR tests

2018-07-12 14:36:48 +00:00

MSP430

Emit a left-shift instead of a power-of-two multiply for jump-tables

2018-05-16 08:58:26 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

finish: [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests

2018-07-11 20:31:51 +00:00

PowerPC

Introduce codegen for the Signal Processing Engine

2018-07-18 04:25:10 +00:00

RISCV

[RISCV] Add machine function pass to merge base + offset

2018-06-27 20:51:42 +00:00

SPARC

Revert "[Sparc] Use the IntPair reg class for r constraints with value type f64"

2018-07-18 10:05:30 +00:00

SystemZ

[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests

2018-07-11 20:25:49 +00:00

Thumb

[CodeGen] Emit more precise AssertZext/AssertSext nodes.

2018-07-11 23:26:35 +00:00

Thumb2

[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.

2018-07-10 23:44:37 +00:00

WebAssembly

[WebAssembly] Update WebAssemblyLowerEmscriptenEHSjLj to handle separate compilation

2018-07-17 16:40:03 +00:00

WinCFGuard

Reland "Emit Function IDs table for Control Flow Guard"

2018-01-09 23:49:30 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[X86][SSE] Add extra scalar fop + blend tests for commuted inputs

2018-07-18 10:54:13 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00