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0638609d66
After r203553 overflow intrinsics and their non-intrinsic (normal) instruction get hashed to the same value. This patch prevents PRE from moving an instruction into a predecessor block, and trying to add a phi node that gets two different types (the intrinsic result and the non-intrinsic result), resulting in a failing assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203574 91177308-0d34-0410-b5e6-96231b3b80d8
68 lines
2.2 KiB
LLVM
68 lines
2.2 KiB
LLVM
; RUN: opt -S -gvn < %s | FileCheck %s
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define i32 @sadd1(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: @sadd1(
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entry:
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%sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
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%cmp = extractvalue { i32, i1 } %sadd, 1
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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ret i32 42
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if.end: ; preds = %entry
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%sadd3 = add i32 %a, %b
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ret i32 %sadd3
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; CHECK-NOT: add i32 %a, %b
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; CHECK: %sadd3.repl = extractvalue { i32, i1 } %sadd, 0
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; CHECK: ret i32 %sadd3.repl
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}
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define i32 @sadd2(i32 %a, i32 %b) #0 {
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entry:
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%sadd3 = add i32 %a, %b
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%sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
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%cmp = extractvalue { i32, i1 } %sadd, 1
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br i1 %cmp, label %if.then, label %if.end
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; CHECK-NOT: %sadd3 = add i32 %a, %b
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; CHECK: %sadd.repl = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
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; CHECK-NOT: %sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
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; CHECK: %sadd3.repl = extractvalue { i32, i1 } %sadd.repl, 0
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if.then: ; preds = %entry
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%sadd4 = add i32 %sadd3, 1
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ret i32 %sadd4
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; CHECK: %sadd4 = add i32 %sadd3.repl, 1
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if.end: ; preds = %entry
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ret i32 %sadd3
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; CHECK: ret i32 %sadd3.repl
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}
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; Check if PRE does not crash
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define i32 @pre(i32 %a, i32 %b) nounwind ssp uwtable {
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entry:
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%cmp = icmp sgt i32 %a, 42
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br i1 %cmp, label %if.then, label %if.end3
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if.then: ; preds = %entry
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%add = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
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%add1 = extractvalue {i32, i1} %add, 0
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%o = extractvalue {i32, i1} %add, 1
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%o32 = zext i1 %o to i32
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%add32 = add i32 %add1, %o32
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%cmp1 = icmp sgt i32 %add1, 42
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br i1 %cmp1, label %if.then2, label %if.end3
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if.then2: ; preds = %if.then
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call void @abort() noreturn
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unreachable
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if.end3: ; preds = %if.end, %entry
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%add4 = add i32 %a, %b
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ret i32 %add4
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}
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declare void @abort() noreturn
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declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
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