llvm/test/CodeGen/PowerPC/fp-branch.ll
Bill Schmidt 101025c33d [PPC] Adjust some PowerPC tests to account for presence/absence of VSX
Patch by Bill Seurer; committed on his behalf.

These test cases generate slightly different code sequences when VSX
is activated and thus fail. The update turns off VSX explicitly for
the existing checks and then adds a second set of checks for most of
them that test the VSX instruction output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220019 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 01:41:22 +00:00

23 lines
791 B
LLVM

; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fcmp | count 1
; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xscmpudp | count 1
declare i1 @llvm.isunordered.f64(double, double)
define i1 @intcoord_cond_next55(double %tmp48.reload) {
newFuncRoot:
br label %cond_next55
bb72.exitStub: ; preds = %cond_next55
ret i1 true
cond_next62.exitStub: ; preds = %cond_next55
ret i1 false
cond_next55: ; preds = %newFuncRoot
%tmp57 = fcmp oge double %tmp48.reload, 1.000000e+00 ; <i1> [#uses=1]
%tmp58 = fcmp uno double %tmp48.reload, 1.000000e+00 ; <i1> [#uses=1]
%tmp59 = or i1 %tmp57, %tmp58 ; <i1> [#uses=1]
br i1 %tmp59, label %bb72.exitStub, label %cond_next62.exitStub
}