Bill Wendling 21e42d0ea5 It's possible to have a constant expression who's size is quite big (e.g., ... i128). In that case, we may not be able to print out the MCExpr as an expression. For instance, we could have an MCExpr like this: 0xBEEF0000BEEF0000 | (0xBEEF0000BEEF0000 << 64) The MCExpr printer handles sizes up to 64-bits, but this expression would require 128-bits. In this situation, try to evaluate the constant expression and emit that as the value into 64-bit chunks. <rdar://problem/11070338> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153081 91177308-0d34-0410-b5e6-96231b3b80d8		2012-03-20 08:56:43 +00:00
..
Analysis	Factor out the multiply analysis code in ComputeMaskedBits and apply it to the	2012-03-18 23:28:48 +00:00
Archive	Avoid using an invalidated iterator.	2012-01-23 05:07:16 +00:00
AsmParser	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
Bitcode	llvm::SwitchInst	2012-03-11 06:09:17 +00:00
CodeGen	It's possible to have a constant expression who's size is quite big (e.g.,	2012-03-20 08:56:43 +00:00
DebugInfo	More dead code removal (using -Wunreachable-code)	2012-01-20 21:51:11 +00:00
ExecutionEngine	Add profiling support for Intel Parallel Amplifier XE (VTune) for JITted code in LLVM.	2012-03-13 08:33:15 +00:00
Linker	Include cctype for isdigit. Patch by Stephen Hines.	2012-03-03 09:36:58 +00:00
MC	MC asm parser macro argument count was wrong when empty.	2012-03-17 00:11:42 +00:00
Object	[Object/COFF]: Expose getSectionContents.	2012-03-19 20:27:37 +00:00
Support	Move APInt::operator[] inline.	2012-03-14 00:38:15 +00:00
TableGen	Fix infinite loop in nested multiclasses.	2012-03-07 16:39:35 +00:00
Target	Remove code that prevented lowering shuffles if they are used by load and themselves used by a extract_vector_elt. This was done to allow the DAG combiner to collapse to a single element load. Unfortunately, sometimes the extract_vector_elt would disappear before DAG combine could do the transformation leaving a vector_shuffle that isel couldn't handle. New code lets the shuffle be converted to a target specific node, but then adds a combine routine that can convert target specific nodes back to vector_shuffles if the folding criteria are met.	2012-03-20 07:17:59 +00:00
Transforms	[asan] don't emit __asan_mapping_offset/__asan_mapping_scale by default -- they are currently used only for experiments	2012-03-19 16:40:35 +00:00
VMCore	Extend the inline cost calculation to account for bonuses due to	2012-03-14 23:19:53 +00:00
CMakeLists.txt
LLVMBuild.txt	LLVMBuild: Introduce a common section which currently has a list of the	2011-12-12 22:45:54 +00:00
Makefile