Tim Northover 1a3fe2bfe6 MIR: parse & print the atomic parts of a MachineMemOperand. ...

We're going to need them very soon for GlobalISel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294992 91177308-0d34-0410-b5e6-96231b3b80d8

2017-02-13 22:14:08 +00:00

..

atomic-memoperands.mir

MIR: parse & print the atomic parts of a MachineMemOperand.

2017-02-13 22:14:08 +00:00

cfi-def-cfa.mir

MIRParser: Use shorter cfi identifiers

2016-07-26 18:20:00 +00:00

expected-target-flag-name.mir

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

generic-virtual-registers-error.mir

[GlobalISel] More fix for the size vs. type typo. NFC.

2016-12-22 22:50:34 +00:00

generic-virtual-registers-with-regbank-error.mir

[GlobalISel] More fix for the size vs. type typo. NFC.

2016-12-22 22:50:34 +00:00

intrinsics.mir

CodeGen: add new "intrinsic" MachineOperand kind.

2016-07-29 20:32:59 +00:00

invalid-target-flag-name.mir

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

lit.local.cfg

MIR Parser: Parse multiple LHS register machine operands.

2015-07-29 18:51:21 +00:00

multiple-lhs-operands.mir

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

register-operand-bank.mir

MIRParser: Allow regclass specification on operand

2017-01-18 00:59:19 +00:00

spill-fold.mir

[AArch64] Fold some filled/spilled subreg COPYs

2017-01-05 21:51:42 +00:00

stack-object-local-offset.mir

MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.

2016-08-24 01:32:41 +00:00

target-flags.mir

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00