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This commit adds a weak variant of the cmpxchg operation, as described in C++11. A cmpxchg instruction with this modifier is permitted to fail to store, even if the comparison indicated it should. As a result, cmpxchg instructions must return a flag indicating success in addition to their original iN value loaded. Thus, for uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The second flag is 1 when the store succeeded. At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been added as the natural representation for the new cmpxchg instructions. It is a strong cmpxchg. By default this gets Expanded to the existing ATOMIC_CMP_SWAP during Legalization, so existing backends should see no change in behaviour. If they wish to deal with the enhanced node instead, they can call setOperationAction on it. Beware: as a node with 2 results, it cannot be selected from TableGen. Currently, no use is made of the extra information provided in this patch. Test updates are almost entirely adapting the input IR to the new scheme. Summary for out of tree users: ------------------------------ + Legacy Bitcode files are upgraded during read. + Legacy assembly IR files will be invalid. + Front-ends must adapt to different type for "cmpxchg". + Backends should be unaffected by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
17 lines
744 B
LLVM
17 lines
744 B
LLVM
; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
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define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
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cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
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; CHECK: cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
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cmpxchg volatile i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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; CHECK: cmpxchg volatile i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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cmpxchg weak i32* %addr, i32 %desired, i32 %new acq_rel acquire
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; CHECK: cmpxchg weak i32* %addr, i32 %desired, i32 %new acq_rel acquire
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cmpxchg weak volatile i32* %addr, i32 %desired, i32 %new singlethread release monotonic
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; CHECK: cmpxchg weak volatile i32* %addr, i32 %desired, i32 %new singlethread release monotonic
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ret void
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} |