JF Bastien 55a57a7674 WebAssembly: fix more syntax ...

br_if shouldn't start with a dot.
div and rem went from prefix u/s to suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250972 91177308-0d34-0410-b5e6-96231b3b80d8

2015-10-22 02:32:50 +00:00

..

AArch64

[AArch64]Merge halfword loads into a 32-bit load

2015-10-19 18:34:53 +00:00

AMDGPU

AMDGPU: Fix verifier error in SIFoldOperands

2015-10-21 22:37:50 +00:00

ARM

Add missing load/store flags to thumb2 instructions.

2015-10-22 01:48:57 +00:00

BPF

[bpf] Do not expand UNDEF SDNode during insn selection lowering

2015-10-08 18:52:40 +00:00

CPP

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Generic

[Hexagon] Reverting test file change.

2015-10-17 01:58:51 +00:00

Hexagon

Tail duplication can mix incompatible registers in phi nodes

2015-10-21 02:40:06 +00:00

Inputs

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Mips

[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC.

2015-10-21 12:44:14 +00:00

MIR

[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.

2015-10-15 14:34:23 +00:00

MSP430

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NVPTX

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PowerPC

[MachO] Stop generating *coal* sections.

2015-10-15 05:28:38 +00:00

SPARC

Drop assert that a call with struct return goes to a function with sret

2015-10-21 20:05:01 +00:00

SystemZ

Let MachineVerifier be aware of mem-to-mem instructions.

2015-10-21 07:39:47 +00:00

Thumb

[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.

2015-10-05 14:49:54 +00:00

Thumb2

[ARM] Use correct half-precision functions in EABI mode

2015-10-07 16:58:49 +00:00

WebAssembly

WebAssembly: fix more syntax

2015-10-22 02:32:50 +00:00

WinEH

[WinEH] Fix eh.exceptionpointer intrinsic lowering

2015-10-17 00:08:08 +00:00

X86

[WinEH] Add test for llvm.va.start in catchpad

2015-10-21 19:54:40 +00:00

XCore

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