llvm/test/CodeGen
Tim Northover 29f94c7201 AArch64/ARM64: move ARM64 into AArch64's place
This commit starts with a "git mv ARM64 AArch64" and continues out
from there, renaming the C++ classes, intrinsics, and other
target-local objects for consistency.

"ARM64" test directories are also moved, and tests that began their
life in ARM64 use an arm64 triple, those from AArch64 use an aarch64
triple. Both should be equivalent though.

This finishes the AArch64 merge, and everyone should feel free to
continue committing as normal now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-24 12:50:23 +00:00
..
AArch64 AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
ARM Segmented stacks: omit __morestack call when there's no frame. 2014-05-22 13:03:43 +00:00
CPP
Generic MC: move test from Generic to COFF 2014-04-23 21:41:07 +00:00
Hexagon reverting r209132 2014-05-19 16:22:11 +00:00
Inputs
Mips Use alias linkage and visibility to decide tls access mode. 2014-05-23 19:16:56 +00:00
MSP430 Fix broken FileCheck prefixes 2014-05-23 19:06:24 +00:00
NVPTX Fix the test: DCE optimized away everything. 2014-04-21 17:23:12 +00:00
PowerPC [PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16Immediate 2014-05-20 17:20:34 +00:00
R600 R600: Try to convert BFE back to standard bit ops when possible. 2014-05-22 18:09:12 +00:00
SPARC TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
SystemZ Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
Thumb Segmented stacks: omit __morestack call when there's no frame. 2014-05-22 13:03:43 +00:00
Thumb2 Fix the Load/Store optimization pass to work with Thumb1. 2014-05-16 14:14:30 +00:00
X86 Use alias linkage and visibility to decide tls access mode. 2014-05-23 19:16:56 +00:00
XCore Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl" 2014-04-21 17:57:07 +00:00