llvm/lib/Target/Sparc
Brian Gaeke 2a9f539168 Fix bug in copying long constants to register pairs. We were getting
the top and bottom halves backwards...how embarrassing.
Support 'cast long to long' and other similar no-op casts to long.
Support 'ret long'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14683 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-08 07:52:13 +00:00
..
DelaySlotFiller.cpp JMPL has a delay slot. 2004-06-18 08:18:54 +00:00
InstSelectSimple.cpp Fix bug in copying long constants to register pairs. We were getting 2004-07-08 07:52:13 +00:00
Makefile Clean up rules 2004-02-28 19:43:40 +00:00
README.txt SparcV8 skeleton 2004-02-25 19:28:19 +00:00
Sparc.h Add references to delay slot filler pass. 2004-04-06 23:21:24 +00:00
Sparc.td Delete reference to "the Mach-O Runtime ABI". 2004-04-06 22:09:59 +00:00
SparcAsmPrinter.cpp Support printing constant pool indices. 2004-06-27 22:50:44 +00:00
SparcInstrInfo.cpp Adjust to change in TII ctor arguments 2004-02-29 06:31:44 +00:00
SparcInstrInfo.h These two virtual methods are never called. 2004-02-29 05:59:33 +00:00
SparcInstrInfo.td Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}. 2004-06-27 22:53:56 +00:00
SparcRegisterInfo.cpp Add #includes 2004-07-04 17:19:21 +00:00
SparcRegisterInfo.h SparcV8 skeleton 2004-02-25 19:28:19 +00:00
SparcRegisterInfo.td Make the double-fp pseudo registers be "NamedRegs". 2004-06-24 09:23:21 +00:00
SparcTargetMachine.cpp Add #includes 2004-07-04 17:19:21 +00:00
SparcTargetMachine.h Adjust to new TM interfaces 2004-06-02 05:47:26 +00:00
SparcV8CodeEmitter.cpp SparcV8 skeleton 2004-02-25 19:28:19 +00:00
SparcV8InstrInfo_F2.td Tab completion is our friend. 2004-02-28 19:45:39 +00:00
SparcV8InstrInfo_F3.td Clean up the commented-out F3_3 stuff. 2004-06-18 06:28:21 +00:00
SparcV8ISelSimple.cpp Fix bug in copying long constants to register pairs. We were getting 2004-07-08 07:52:13 +00:00
SparcV8JITInfo.h SparcV8 skeleton 2004-02-25 19:28:19 +00:00

SparcV8 backend skeleton
------------------------

This directory will house a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  Watch this space for more news coming soon!

$Date$