mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-30 00:15:55 +00:00
d40758b24e
DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two mistakes: 1. It was checking the legality of scalar INT_TO_FP nodes and then generating vector nodes. 2. It was passing the result value type to TargetLoweringInfo::getOperationAction() when it should have been passing the value type of the first operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171420 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
add.v4i32.ll | ||
and.v4i32.ll | ||
dagcombiner-bug-illegal-vec4-int-to-fp.ll | ||
fabs.ll | ||
fadd.ll | ||
fadd.v4f32.ll | ||
fcmp-cnd.ll | ||
fcmp-cnde-int-args.ll | ||
fcmp.ll | ||
fdiv.v4f32.ll | ||
floor.ll | ||
fmax.ll | ||
fmin.ll | ||
fmul.ll | ||
fmul.v4f32.ll | ||
fsub.ll | ||
fsub.v4f32.ll | ||
i8_to_double_to_float.ll | ||
icmp-select-sete-reverse-args.ll | ||
lit.local.cfg | ||
literals.ll | ||
llvm.AMDGPU.mul.ll | ||
llvm.AMDGPU.trunc.ll | ||
llvm.cos.ll | ||
llvm.pow.ll | ||
llvm.sin.ll | ||
load.constant_addrspace.f32.ll | ||
load.i8.ll | ||
reciprocal.ll | ||
sdiv.ll | ||
selectcc_cnde_int.ll | ||
selectcc_cnde.ll | ||
selectcc-icmp-select-float.ll | ||
setcc.v4i32.ll | ||
short-args.ll | ||
store.v4f32.ll | ||
store.v4i32.ll | ||
udiv.v4i32.ll | ||
urem.v4i32.ll | ||
vec4-expand.ll |