llvm/test/CodeGen/Thumb2/thumb2-lsr3.ll
Joerg Sonnenberger aca2998f14 Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-13 11:16:00 +00:00

20 lines
399 B
LLVM

; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
define i1 @test1(i64 %poscnt, i32 %work) {
entry:
; CHECK: lsrs.w r1, r1, #1
; CHECK: rrx r0, r0
%0 = lshr i64 %poscnt, 1
%1 = icmp eq i64 %0, 0
ret i1 %1
}
define i1 @test2(i64 %poscnt, i32 %work) {
entry:
; CHECK: asrs.w r1, r1, #1
; CHECK: rrx r0, r0
%0 = ashr i64 %poscnt, 1
%1 = icmp eq i64 %0, 0
ret i1 %1
}