Juergen Ributzka 2c68cde701 [FastISel][AArch64] Fix shift lowering for i8 and i16 value types.
This fix changes the parameters #r and #s that are passed to the UBFM/SBFM
instruction to get the zero/sign-extension for free.

The original problem was that the shift left would use the 32-bit shift even for
i8/i16 value types, which could leave the upper bits set with "garbage" values.

The arithmetic shift right on the other side would use the wrong MSB as sign-bit
to determine what bits to shift into the value.

This fixes <rdar://problem/17907720>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214788 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:49:51 +00:00
2014-04-07 03:57:04 +00:00
2014-06-25 13:13:36 +00:00
2014-05-29 19:59:58 +00:00
2014-03-12 22:40:22 +00:00
2014-07-16 16:50:34 +00:00
2014-04-26 19:05:45 +00:00

Low Level Virtual Machine (LLVM)
================================

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Old fork of llvm-mirror, used on older RPCS3 builds
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