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llvm/lib/Target/R600
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Benjamin Kramer e003f1ac8c Make helper functions/classes/globals static. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228410 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-06 17:51:54 +00:00
..
AsmParser
R600/SI: Add a stub GCNTargetMachine
2015-01-06 18:00:21 +00:00
InstPrinter
[cleanup] Re-sort all the #include lines in LLVM using
2015-01-14 11:23:27 +00:00
MCTargetDesc
Add r224985 back with fixes.
2015-01-19 21:11:14 +00:00
TargetInfo
R600/SI: Add a stub GCNTargetMachine
2015-01-06 18:00:21 +00:00
AMDGPU.h
[PM] Remove a bunch of stale TTI creation method declarations. I nuked
2015-02-01 00:22:15 +00:00
AMDGPU.td
R600/SI: Add subtarget feature for if f32 fma is fast
2015-01-29 19:34:25 +00:00
AMDGPUAlwaysInlinePass.cpp
Reapply: R600: Make sure to inline all internal functions
2014-11-03 19:49:05 +00:00
AMDGPUAsmPrinter.cpp
Compute the ELF SectionKind from the flags.
2015-01-29 17:33:21 +00:00
AMDGPUAsmPrinter.h
std::unique_ptrify the MCStreamer argument to createAsmPrinter
2015-01-18 20:29:04 +00:00
AMDGPUCallingConv.td
Remove the target machine from CCState. Previously it was only used
2014-08-06 18:45:26 +00:00
AMDGPUFrameLowering.cpp
Fix typo
2014-06-14 04:26:07 +00:00
AMDGPUFrameLowering.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
AMDGPUInstrInfo.cpp
Make helper functions/classes/globals static. NFC.
2015-02-06 17:51:54 +00:00
AMDGPUInstrInfo.h
R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2
2015-02-03 17:37:57 +00:00
AMDGPUInstrInfo.td
R600/SI: Add class intrinsic
2015-01-06 23:00:37 +00:00
AMDGPUInstructions.td
R600/SI: Only select cvt_flr/cvt_rpi with no NaNs.
2015-01-31 21:28:13 +00:00
AMDGPUIntrinsicInfo.cpp
Move R600 subtarget dependent variables onto the subtarget.
2014-07-25 22:22:39 +00:00
AMDGPUIntrinsicInfo.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
AMDGPUIntrinsics.td
R600: Remove intrinsics that appear to be unused
2014-07-15 20:10:27 +00:00
AMDGPUISelDAGToDAG.cpp
R600: Don't promote i64 stores to v2i32 during DAG legalization
2015-02-04 20:49:49 +00:00
AMDGPUISelLowering.cpp
R600/SI: Make more store operations legal
2015-02-04 20:49:51 +00:00
AMDGPUISelLowering.h
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
AMDGPUMachineFunction.cpp
R600/SI: Add preliminary support for flat address space
2014-09-15 15:41:53 +00:00
AMDGPUMachineFunction.h
Reapply "R600: Add new intrinsic to read work dimensions"
2014-10-14 20:05:26 +00:00
AMDGPUMCInstLower.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
AMDGPUMCInstLower.h
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
AMDGPUPromoteAlloca.cpp
R600: Don't promote allocas when one of the users is a ptrtoint instruction
2014-10-31 20:52:04 +00:00
AMDGPURegisterInfo.cpp
R600/SI: Enable inline assembly
2014-12-03 04:08:00 +00:00
AMDGPURegisterInfo.h
Add override to overriden virtual methods, remove virtual keywords.
2014-09-03 11:41:21 +00:00
AMDGPURegisterInfo.td
Make SubRegIndex size mandatory, following r183020.
2013-05-31 23:45:26 +00:00
AMDGPUSubtarget.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
AMDGPUSubtarget.h
R600/SI: Enable subreg liveness by default
2015-02-04 23:14:18 +00:00
AMDGPUTargetMachine.cpp
[multiversion] Switch all of the targets over to use the
2015-02-01 13:20:00 +00:00
AMDGPUTargetMachine.h
[multiversion] Switch all of the targets over to use the
2015-02-01 13:20:00 +00:00
AMDGPUTargetTransformInfo.cpp
R600/SI: Fix bug in TTI loop unrolling preferences
2015-02-05 15:32:18 +00:00
AMDGPUTargetTransformInfo.h
[multiversion] Remove the function parameter from the unrolling
2015-02-01 14:31:23 +00:00
AMDILCFGStructurizer.cpp
Fix typos:
2014-08-11 18:04:46 +00:00
AMDKernelCodeT.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
CaymanInstructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
CIInstructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
CMakeLists.txt
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
EvergreenInstructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
LLVMBuild.txt
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Makefile
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Processors.td
R600/SI: Add subtarget feature for if f32 fma is fast
2015-01-29 19:34:25 +00:00
R600ClauseMergePass.cpp
Have MachineFunction cache a pointer to the subtarget to make lookups
2014-08-05 02:39:49 +00:00
R600ControlFlowFinalizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600Defines.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600EmitClauseMarkers.cpp
Have MachineFunction cache a pointer to the subtarget to make lookups
2014-08-05 02:39:49 +00:00
R600ExpandSpecialInstrs.cpp
Have MachineFunction cache a pointer to the subtarget to make lookups
2014-08-05 02:39:49 +00:00
R600InstrFormats.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp
Remove unused argument to CreateTargetScheduleState and change
2014-10-09 01:59:35 +00:00
R600InstrInfo.h
Remove unused argument to CreateTargetScheduleState and change
2014-10-09 01:59:35 +00:00
R600Instructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600Intrinsics.td
R600: Reenable llvm.R600.load.input/interp.input for compatibility
2013-11-12 16:26:47 +00:00
R600ISelLowering.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600ISelLowering.h
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600MachineFunctionInfo.cpp
[weak vtables] Remove a bunch of weak vtables
2013-11-19 00:57:56 +00:00
R600MachineFunctionInfo.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600MachineScheduler.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600MachineScheduler.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600OptimizeVectorRegisters.cpp
Eliminate some deep std::vector copies. NFC.
2014-10-03 18:33:16 +00:00
R600Packetizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600RegisterInfo.cpp
R600: Remove AMDIL instruction and register definitions
2014-06-13 16:38:59 +00:00
R600RegisterInfo.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600RegisterInfo.td
R600: Use LDS and vectors for private memory
2014-06-17 16:53:14 +00:00
R600Schedule.td
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
R600TextureIntrinsicsReplacer.cpp
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition
2014-04-29 07:57:24 +00:00
R700Instructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
SIAnnotateControlFlow.cpp
R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers
2015-02-05 15:32:15 +00:00
SIDefines.h
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
2015-02-06 02:51:20 +00:00
SIFixSGPRCopies.cpp
R600/SI: Remove VReg_32 register class
2015-01-07 20:59:25 +00:00
SIFixSGPRLiveRanges.cpp
R600/SI: Fix the FixSGPRLiveRanges pass
2014-09-24 01:33:24 +00:00
SIFoldOperands.cpp
Fix typo
2015-01-31 23:37:27 +00:00
SIInsertWaits.cpp
R600/SI: Fix dependency between instruction writing M0 and S_SENDMSG on VI (v2)
2015-02-03 17:37:52 +00:00
SIInstrFormats.td
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
2015-02-06 02:51:20 +00:00
SIInstrInfo.cpp
R600/SI: Fix B64 VALU shifts on VI
2015-02-03 21:53:01 +00:00
SIInstrInfo.h
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
2015-02-06 02:51:20 +00:00
SIInstrInfo.td
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
2015-02-06 02:51:20 +00:00
SIInstructions.td
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
2015-02-06 02:51:20 +00:00
SIIntrinsics.td
R600/SI: Use i32 vectors for resources and samplers
2014-07-11 17:11:52 +00:00
SIISelLowering.cpp
R600/SI: Expand misaligned 16-bit memory accesses
2015-02-04 20:49:52 +00:00
SIISelLowering.h
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
SILoadStoreOptimizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
SILowerControlFlow.cpp
R600/SI: Don't enable WQM for V_INTERP_* instructions v2
2015-02-06 02:51:25 +00:00
SILowerI1Copies.cpp
R600/SI: Remove VReg_32 register class
2015-01-07 20:59:25 +00:00
SIMachineFunctionInfo.cpp
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
SIMachineFunctionInfo.h
R600/SI: Add subtarget feature to enable VGPR spilling for all shader types
2015-01-20 19:33:04 +00:00
SIPrepareScratchRegs.cpp
R600/SI: Fix simple-loop.ll test
2015-01-20 19:33:02 +00:00
SIRegisterInfo.cpp
R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2
2015-02-03 17:37:57 +00:00
SIRegisterInfo.h
R600/SI: Define a schedule model and enable the generic machine scheduler
2015-01-29 16:55:25 +00:00
SIRegisterInfo.td
R600/SI: Use RegisterOperands to specify which operands can accept immediates
2015-01-12 19:33:18 +00:00
SISchedule.td
R600/SI: Define a schedule model
2015-01-14 01:13:19 +00:00
SIShrinkInstructions.cpp
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
SITypeRewriter.cpp
Revert "IR: MDNode => Value"
2014-11-11 21:30:22 +00:00
VIInstrFormats.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
VIInstructions.td
R600/SI: Add VI versions of MUBUF loads and stores
2015-01-27 17:24:58 +00:00