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Alpha
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remove dead code
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2005-12-22 21:16:08 +00:00 |
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CBackend
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do not allow '.' in symbol names
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2005-11-10 21:39:29 +00:00 |
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IA64
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remove dead code
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2005-12-22 21:16:08 +00:00 |
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PowerPC
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make sure bit_converts are expanded
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2005-12-23 05:13:35 +00:00 |
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Skeleton
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Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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2005-12-01 04:51:06 +00:00 |
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Sparc
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fix something-o
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2005-12-23 07:08:39 +00:00 |
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SparcV8
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fix something-o
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2005-12-23 07:08:39 +00:00 |
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SparcV9
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Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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2005-12-01 04:51:06 +00:00 |
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X86
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make sure bit_convert's are expanded
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2005-12-23 05:15:23 +00:00 |
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Makefile
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DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now
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2005-10-24 02:26:13 +00:00 |
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MRegisterInfo.cpp
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Rename MRegisterDesc -> TargetRegisterDesc for consistency
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2005-09-30 17:49:27 +00:00 |
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SubtargetFeature.cpp
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Preparation of supporting scheduling info. Need to find info based on selected
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2005-10-25 15:15:28 +00:00 |
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Target.td
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Added support to specify predicates.
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2005-12-14 22:02:59 +00:00 |
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TargetData.cpp
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Update to use the new MathExtras.h support for log2 computation.
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2005-08-02 19:26:06 +00:00 |
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TargetFrameInfo.cpp
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Eliminate all remaining tabs and trailing spaces.
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2005-07-27 06:12:32 +00:00 |
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TargetInstrInfo.cpp
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Convert tabs to spaces
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2005-04-22 17:54:37 +00:00 |
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TargetMachine.cpp
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Remove the X86 and PowerPC Simple instruction selectors; their time has
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2005-08-18 23:53:15 +00:00 |
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TargetMachineRegistry.cpp
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1. Use SubtargetFeatures in llc/lli.
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2005-09-01 21:38:21 +00:00 |
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TargetSchedInfo.cpp
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Convert tabs to spaces
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2005-04-22 17:54:37 +00:00 |
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TargetSchedule.td
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add a marker
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2005-10-23 22:07:20 +00:00 |
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TargetSelectionDAG.td
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Added special flag node FLAG.
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2005-12-22 02:25:14 +00:00 |
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TargetSubtarget.cpp
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Eliminate all remaining tabs and trailing spaces.
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2005-07-27 06:12:32 +00:00 |
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